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dp8393x: Store CAM registers as 16-bit
Per the DP83932C datasheet from July 1995: 4.0 SONIC Registers 4.1 THE CAM UNIT The Content Addressable Memory (CAM) consists of sixteen 48-bit entries for complete address filtering of network packets. Each entry corresponds to a 48-bit destination address that is user programmable and can contain any combination of Multicast or Physical addresses. Each entry is partitioned into three 16-bit CAM cells accessible through CAM Address Ports (CAP 2, CAP 1 and CAP 0) with CAP0 corresponding to the least significant 16 bits of the Destination Address and CAP2 corresponding to the most significant bits. Store the CAM registers as 16-bit as it simplifies the code. Having now the CAM registers as arrays of 3 uint16_t, we can avoid using the VMSTATE_BUFFER_UNSAFE macro by using VMSTATE_UINT16_2DARRAY which is more appropriate. This breaks the migration stream however. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Finn Thain <fthain@linux-m68k.org> Message-Id: <20210710174954.2577195-5-f4bug@amsat.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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@ -158,7 +158,7 @@ struct dp8393xState {
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MemoryRegion mmio;
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MemoryRegion mmio;
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/* Registers */
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/* Registers */
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uint8_t cam[16][6];
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uint16_t cam[16][3];
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uint16_t regs[SONIC_REG_COUNT];
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uint16_t regs[SONIC_REG_COUNT];
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/* Temporaries */
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/* Temporaries */
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@ -281,15 +281,13 @@ static void dp8393x_do_load_cam(dp8393xState *s)
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address_space_read(&s->as, dp8393x_cdp(s),
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address_space_read(&s->as, dp8393x_cdp(s),
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MEMTXATTRS_UNSPECIFIED, s->data, size);
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MEMTXATTRS_UNSPECIFIED, s->data, size);
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index = dp8393x_get(s, width, 0) & 0xf;
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index = dp8393x_get(s, width, 0) & 0xf;
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s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff;
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s->cam[index][0] = dp8393x_get(s, width, 1);
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s->cam[index][1] = dp8393x_get(s, width, 1) >> 8;
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s->cam[index][1] = dp8393x_get(s, width, 2);
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s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff;
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s->cam[index][2] = dp8393x_get(s, width, 3);
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s->cam[index][3] = dp8393x_get(s, width, 2) >> 8;
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trace_dp8393x_load_cam(index,
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s->cam[index][4] = dp8393x_get(s, width, 3) & 0xff;
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s->cam[index][0] >> 8, s->cam[index][0] & 0xff,
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s->cam[index][5] = dp8393x_get(s, width, 3) >> 8;
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s->cam[index][1] >> 8, s->cam[index][1] & 0xff,
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trace_dp8393x_load_cam(index, s->cam[index][0], s->cam[index][1],
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s->cam[index][2] >> 8, s->cam[index][2] & 0xff);
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s->cam[index][2], s->cam[index][3],
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s->cam[index][4], s->cam[index][5]);
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/* Move to next entry */
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/* Move to next entry */
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s->regs[SONIC_CDC]--;
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s->regs[SONIC_CDC]--;
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s->regs[SONIC_CDP] += size;
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s->regs[SONIC_CDP] += size;
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@ -592,8 +590,7 @@ static uint64_t dp8393x_read(void *opaque, hwaddr addr, unsigned int size)
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case SONIC_CAP1:
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case SONIC_CAP1:
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case SONIC_CAP0:
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case SONIC_CAP0:
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if (s->regs[SONIC_CR] & SONIC_CR_RST) {
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if (s->regs[SONIC_CR] & SONIC_CR_RST) {
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val = s->cam[s->regs[SONIC_CEP] & 0xf][2 * (SONIC_CAP0 - reg) + 1] << 8;
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val = s->cam[s->regs[SONIC_CEP] & 0xf][SONIC_CAP0 - reg];
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val |= s->cam[s->regs[SONIC_CEP] & 0xf][2 * (SONIC_CAP0 - reg)];
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}
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}
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break;
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break;
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/* All other registers have no special contraints */
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/* All other registers have no special contraints */
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@ -984,10 +981,10 @@ static void dp8393x_realize(DeviceState *dev, Error **errp)
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static const VMStateDescription vmstate_dp8393x = {
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static const VMStateDescription vmstate_dp8393x = {
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.name = "dp8393x",
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.name = "dp8393x",
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.version_id = 0,
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.version_id = 1,
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.minimum_version_id = 0,
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.minimum_version_id = 1,
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.fields = (VMStateField []) {
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.fields = (VMStateField []) {
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VMSTATE_BUFFER_UNSAFE(cam, dp8393xState, 0, 16 * 6),
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VMSTATE_UINT16_2DARRAY(cam, dp8393xState, 16, 3),
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VMSTATE_UINT16_ARRAY(regs, dp8393xState, SONIC_REG_COUNT),
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VMSTATE_UINT16_ARRAY(regs, dp8393xState, SONIC_REG_COUNT),
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VMSTATE_END_OF_LIST()
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VMSTATE_END_OF_LIST()
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}
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}
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