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microblaze: Add an MSR_PVR constant and use it. 

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
This commit is contained in:
Edgar E. Iglesias 2011-08-25 16:41:19 +10:00 committed by Edgar E. Iglesias
parent 97b833c5df
commit 8a84fc6bf7
2 changed files with 3 additions and 2 deletions
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1
target-microblaze/cpu.h
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@ -65,6 +65,7 @@ struct CPUMBState;
#define MSR_DCE (1<<7) /* 0x080 */ #define MSR_DCE (1<<7) /* 0x080 */
#define MSR_EE (1<<8) /* 0x100 */ #define MSR_EE (1<<8) /* 0x100 */
#define MSR_EIP (1<<9) /* 0x200 */ #define MSR_EIP (1<<9) /* 0x200 */
#define MSR_PVR (1<<10) /* 0x400 */
#define MSR_CC (1<<31) #define MSR_CC (1<<31)
/* Machine State Register (MSR) Fields */ /* Machine State Register (MSR) Fields */

4
target-microblaze/translate.c
View File

@ -429,8 +429,8 @@ static inline void msr_write(DisasContext *dc, TCGv v)
t = tcg_temp_new(); t = tcg_temp_new();
dc->cpustate_changed = 1; dc->cpustate_changed = 1;
/* PVR bit is not writable. */ /* PVR bit is not writable. */
tcg_gen_andi_tl(t, v, ~(1 << 10)); tcg_gen_andi_tl(t, v, ~MSR_PVR);
tcg_gen_andi_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], (1 << 10)); tcg_gen_andi_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], MSR_PVR);
tcg_gen_or_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], v); tcg_gen_or_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], v);
tcg_temp_free(t); tcg_temp_free(t);
} }