From 8a6b3f4dc95a064e88adaca86374108da0ecb38d Mon Sep 17 00:00:00 2001 From: Zhenzhong Duan Date: Thu, 25 Jan 2024 15:37:06 +0800 Subject: [PATCH] smmu: Clear SMMUPciBus pointer cache when system reset s->smmu_pcibus_by_bus_num is a SMMUPciBus pointer cache indexed by bus number, bus number may not always be a fixed value, i.e., guest reboot to different kernel which set bus number with different algorithm. This could lead to smmu_iommu_mr() providing the wrong iommu MR. Suggested-by: Eric Auger Signed-off-by: Zhenzhong Duan Message-Id: <20240125073706.339369-3-zhenzhong.duan@intel.com> Reviewed-by: Eric Auger Tested-by: Eric Auger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/arm/smmu-common.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 9a8ac45431..f58261bb81 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -675,6 +675,8 @@ static void smmu_base_reset_hold(Object *obj) { SMMUState *s = ARM_SMMU(obj); + memset(s->smmu_pcibus_by_bus_num, 0, sizeof(s->smmu_pcibus_by_bus_num)); + g_hash_table_remove_all(s->configs); g_hash_table_remove_all(s->iotlb); }