mirror of https://github.com/xemu-project/xemu.git
aspeed queue:
* Coverity fixes * Deprecation of tacoma-bmc machine * Buffer overflow fix in GPIO model * Minor cleanup -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmaDs3QACgkQUaNDx8/7 7KEc/BAAj5AS3rLm3NPpU13y1P1hcjuSm1/PVGTJQH+m4K9UaAkJ8VhRB0Y/rdU6 ygGhKaCHyk96+I49Csz886YU9Wg9qnxaYJAbornHZJVGNy5tuVpQKM20kfgN3XFN ENJR3e+J6Ye7kCtR1ujcf0mydWDaDyq0i82ykURsudcQLMnGq1gBQGadYjt1hJoN F9HDPgUJ8/wjQnG8BomsrnuvUSpRTbGNV66FNxXdQ6C6d6OTKQfNnXXqrKO+8QPK B5XB9FjTk017DUog1jdE1SaEMowml8CmUhjMwLHOcyWhcZpEk90aMX8cQhefUs9y O6kNin2UYEjcTHA/lyfMQJQMNDDZTE32MyP1LwRE/5ZiHqrT7ViqNvZSPBGBueUz 9B0xiQTuYqcRqlwgyU73DvnTgrsKFdKQSldj5dXYVnWCKeKY/sCWApHMJxN9xMCA Uw1E4QfCLkd+TM6DoJAkBHWFsgi44Aym11VU4VviGNRNTgmTptgQzmHiYGNFiGZG OypVPM8Ti6UeVnW65l9J9f7xA0jDB+XQjhCCaoax9GlUMA4C4/Aln5OXXxIWRWFd XA3Gn3c/S2j7rMqdfAk68xDHuAJ3wShHlw6HLRd1Xki05WFTeLj1lejLHMdfpNmr DkQimzHShBqZzZGxc7FsO0keGY8kyIJkZhbCCbZrFXJXQGRdBao= =LxwO -----END PGP SIGNATURE----- Merge tag 'pull-aspeed-20240702' of https://github.com/legoater/qemu into staging aspeed queue: * Coverity fixes * Deprecation of tacoma-bmc machine * Buffer overflow fix in GPIO model * Minor cleanup # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmaDs3QACgkQUaNDx8/7 # 7KEc/BAAj5AS3rLm3NPpU13y1P1hcjuSm1/PVGTJQH+m4K9UaAkJ8VhRB0Y/rdU6 # ygGhKaCHyk96+I49Csz886YU9Wg9qnxaYJAbornHZJVGNy5tuVpQKM20kfgN3XFN # ENJR3e+J6Ye7kCtR1ujcf0mydWDaDyq0i82ykURsudcQLMnGq1gBQGadYjt1hJoN # F9HDPgUJ8/wjQnG8BomsrnuvUSpRTbGNV66FNxXdQ6C6d6OTKQfNnXXqrKO+8QPK # B5XB9FjTk017DUog1jdE1SaEMowml8CmUhjMwLHOcyWhcZpEk90aMX8cQhefUs9y # O6kNin2UYEjcTHA/lyfMQJQMNDDZTE32MyP1LwRE/5ZiHqrT7ViqNvZSPBGBueUz # 9B0xiQTuYqcRqlwgyU73DvnTgrsKFdKQSldj5dXYVnWCKeKY/sCWApHMJxN9xMCA # Uw1E4QfCLkd+TM6DoJAkBHWFsgi44Aym11VU4VviGNRNTgmTptgQzmHiYGNFiGZG # OypVPM8Ti6UeVnW65l9J9f7xA0jDB+XQjhCCaoax9GlUMA4C4/Aln5OXXxIWRWFd # XA3Gn3c/S2j7rMqdfAk68xDHuAJ3wShHlw6HLRd1Xki05WFTeLj1lejLHMdfpNmr # DkQimzHShBqZzZGxc7FsO0keGY8kyIJkZhbCCbZrFXJXQGRdBao= # =LxwO # -----END PGP SIGNATURE----- # gpg: Signature made Tue 02 Jul 2024 12:59:48 AM PDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20240702' of https://github.com/legoater/qemu: hw/net:ftgmac100: fix coding style aspeed/sdmc: Remove extra R_MAIN_STATUS case aspeed/soc: Fix possible divide by zero aspeed/sdmc: Check RAM size value at realize time aspeed: Deprecate the tacoma-bmc machine hw/gpio/aspeed: Add reg_table_count to AspeedGPIOClass Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
commit
8a2b8894d2
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@ -269,6 +269,14 @@ images are not available, OpenWRT dropped support in 2019, U-Boot in
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2017, Linux also is dropping support in 2024. It is time to let go of
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this ancient hardware and focus on newer CPUs and platforms.
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Arm ``tacoma-bmc`` machine (since 9.1)
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''''''''''''''''''''''''''''''''''''''''
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The ``tacoma-bmc`` machine was a board including an AST2600 SoC based
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BMC and a witherspoon like OpenPOWER system. It was used for bring up
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of the AST2600 SoC in labs. It can be easily replaced by the
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``rainier-bmc`` machine which is a real product.
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Backend options
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---------------
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@ -1379,6 +1379,8 @@ static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data)
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amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */
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mc->default_ram_size = 1 * GiB;
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aspeed_machine_class_init_cpus_defaults(mc);
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mc->deprecation_reason = "Please use the similar 'rainier-bmc' machine";
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};
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static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data)
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@ -211,6 +211,8 @@ static void aspeed_ram_capacity_write(void *opaque, hwaddr addr, uint64_t data,
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ram_size = object_property_get_uint(OBJECT(&s->sdmc), "ram-size",
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&error_abort);
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assert(ram_size > 0);
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/*
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* Emulate ddr capacity hardware behavior.
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* If writes the data to the address which is beyond the ram size,
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@ -559,6 +559,12 @@ static uint64_t aspeed_gpio_read(void *opaque, hwaddr offset, uint32_t size)
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return debounce_value;
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}
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if (idx >= agc->reg_table_count) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: idx 0x%" PRIx64 " out of bounds\n",
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__func__, idx);
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return 0;
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}
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reg = &agc->reg_table[idx];
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if (reg->set_idx >= agc->nr_gpio_sets) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: no getter for offset 0x%"
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@ -785,6 +791,12 @@ static void aspeed_gpio_write(void *opaque, hwaddr offset, uint64_t data,
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return;
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}
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if (idx >= agc->reg_table_count) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: idx 0x%" PRIx64 " out of bounds\n",
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__func__, idx);
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return;
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}
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reg = &agc->reg_table[idx];
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if (reg->set_idx >= agc->nr_gpio_sets) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: no setter for offset 0x%"
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@ -1117,6 +1129,7 @@ static void aspeed_gpio_ast2400_class_init(ObjectClass *klass, void *data)
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agc->nr_gpio_pins = 216;
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agc->nr_gpio_sets = 7;
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agc->reg_table = aspeed_3_3v_gpios;
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agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
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}
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static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data)
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@ -1127,6 +1140,7 @@ static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data)
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agc->nr_gpio_pins = 228;
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agc->nr_gpio_sets = 8;
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agc->reg_table = aspeed_3_3v_gpios;
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agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
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}
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static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *data)
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@ -1137,6 +1151,7 @@ static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *data)
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agc->nr_gpio_pins = 208;
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agc->nr_gpio_sets = 7;
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agc->reg_table = aspeed_3_3v_gpios;
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agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
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}
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static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *data)
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@ -1147,6 +1162,7 @@ static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *data)
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agc->nr_gpio_pins = 36;
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agc->nr_gpio_sets = 2;
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agc->reg_table = aspeed_1_8v_gpios;
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agc->reg_table_count = GPIO_1_8V_REG_ARRAY_SIZE;
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}
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static void aspeed_gpio_1030_class_init(ObjectClass *klass, void *data)
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@ -1157,6 +1173,7 @@ static void aspeed_gpio_1030_class_init(ObjectClass *klass, void *data)
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agc->nr_gpio_pins = 151;
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agc->nr_gpio_sets = 6;
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agc->reg_table = aspeed_3_3v_gpios;
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agc->reg_table_count = GPIO_3_3V_REG_ARRAY_SIZE;
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}
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static const TypeInfo aspeed_gpio_info = {
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@ -271,6 +271,12 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
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AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s);
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assert(asc->max_ram_size < 4 * GiB || asc->is_bus64bit);
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if (!s->ram_size) {
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error_setg(errp, "RAM size is not set");
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return;
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}
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s->max_ram_size = asc->max_ram_size;
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memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s,
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@ -589,7 +595,6 @@ static void aspeed_2700_sdmc_write(AspeedSDMCState *s, uint32_t reg,
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case R_INT_STATUS:
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case R_INT_CLEAR:
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case R_INT_MASK:
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case R_MAIN_STATUS:
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case R_ERR_STATUS:
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case R_ECC_FAIL_STATUS:
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case R_ECC_FAIL_ADDR:
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@ -238,7 +238,8 @@ typedef struct {
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*/
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#define FTGMAC100_MAX_FRAME_SIZE 9220
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/* Limits depending on the type of the frame
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/*
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* Limits depending on the type of the frame
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*
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* 9216 for Jumbo frames (+ 4 for VLAN)
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* 1518 for other frames (+ 4 for VLAN)
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break;
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}
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/* record transmit flags as they are valid only on the first
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* segment */
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/*
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* record transmit flags as they are valid only on the first
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* segment
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*/
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if (bd.des0 & FTGMAC100_TXDES0_FTS) {
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flags = bd.des1;
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}
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@ -639,7 +642,8 @@ static bool ftgmac100_can_receive(NetClientState *nc)
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*/
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static uint32_t ftgmac100_rxpoll(FTGMAC100State *s)
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{
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/* Polling times :
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/*
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* Polling times :
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*
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* Speed TIME_SEL=0 TIME_SEL=1
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*
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@ -75,6 +75,7 @@ struct AspeedGPIOClass {
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uint32_t nr_gpio_pins;
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uint32_t nr_gpio_sets;
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const AspeedGPIOReg *reg_table;
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unsigned reg_table_count;
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};
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struct AspeedGPIOState {
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