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target/hppa: Do not use hardcoded value for tlb_flush_*()
Avoid using hardcoded values when calling the tlb_flush*() functions. Instead, define and use HPPA_MMU_FLUSH_MASK (keeping the current behavior, which doesn't flush the physical address MMU). Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -41,6 +41,11 @@
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#define TARGET_INSN_START_EXTRA_WORDS 1
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#define TARGET_INSN_START_EXTRA_WORDS 1
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/* No need to flush MMU_PHYS_IDX */
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#define HPPA_MMU_FLUSH_MASK \
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(1 << MMU_KERNEL_IDX | 1 << MMU_PL1_IDX | \
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1 << MMU_PL2_IDX | 1 << MMU_USER_IDX)
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/* Hardware exceptions, interrupts, faults, and traps. */
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/* Hardware exceptions, interrupts, faults, and traps. */
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#define EXCP_HPMC 1 /* high priority machine check */
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#define EXCP_HPMC 1 /* high priority machine check */
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#define EXCP_POWER_FAIL 2
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#define EXCP_POWER_FAIL 2
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@ -71,7 +71,7 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ureg psw)
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/* If PSW_P changes, it affects how we translate addresses. */
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/* If PSW_P changes, it affects how we translate addresses. */
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if ((psw ^ old_psw) & PSW_P) {
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if ((psw ^ old_psw) & PSW_P) {
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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tlb_flush_by_mmuidx(env_cpu(env), 0xf);
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tlb_flush_by_mmuidx(env_cpu(env), HPPA_MMU_FLUSH_MASK);
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#endif
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#endif
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}
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}
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}
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}
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@ -50,8 +50,7 @@ static void hppa_flush_tlb_ent(CPUHPPAState *env, hppa_tlb_entry *ent)
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trace_hppa_tlb_flush_ent(env, ent, ent->va_b, ent->va_e, ent->pa);
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trace_hppa_tlb_flush_ent(env, ent, ent->va_b, ent->va_e, ent->pa);
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for (i = 0; i < n; ++i, addr += TARGET_PAGE_SIZE) {
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for (i = 0; i < n; ++i, addr += TARGET_PAGE_SIZE) {
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/* Do not flush MMU_PHYS_IDX. */
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tlb_flush_page_by_mmuidx(cs, addr, HPPA_MMU_FLUSH_MASK);
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tlb_flush_page_by_mmuidx(cs, addr, 0xf);
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}
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}
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memset(ent, 0, sizeof(*ent));
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memset(ent, 0, sizeof(*ent));
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@ -335,13 +334,13 @@ void HELPER(ptlbe)(CPUHPPAState *env)
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{
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{
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trace_hppa_tlb_ptlbe(env);
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trace_hppa_tlb_ptlbe(env);
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memset(env->tlb, 0, sizeof(env->tlb));
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memset(env->tlb, 0, sizeof(env->tlb));
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tlb_flush_by_mmuidx(env_cpu(env), 0xf);
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tlb_flush_by_mmuidx(env_cpu(env), HPPA_MMU_FLUSH_MASK);
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}
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}
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void cpu_hppa_change_prot_id(CPUHPPAState *env)
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void cpu_hppa_change_prot_id(CPUHPPAState *env)
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{
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{
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if (env->psw & PSW_P) {
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if (env->psw & PSW_P) {
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tlb_flush_by_mmuidx(env_cpu(env), 0xf);
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tlb_flush_by_mmuidx(env_cpu(env), HPPA_MMU_FLUSH_MASK);
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}
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}
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}
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}
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