From 881d1073d0f83d9a07e5ea3ff444e1bef9679a7c Mon Sep 17 00:00:00 2001 From: Helge Deller Date: Tue, 7 Nov 2023 22:32:36 +0100 Subject: [PATCH] target/hppa: Mask reserved PSW bits in expand_sm_imm The system mask is a restricted subset of the psw, with only a couple of reserved bits. It is better to handle this up front in the translator than require helper_swap_system_mask to use cpu_hppa_get_psw and cpu_hppa_put_psw. Signed-off-by: Helge Deller [rth: Handle this in expand_sm_imm not helper_swap_system_mask.] Signed-off-by: Richard Henderson --- target/hppa/translate.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index bcce65d587..f3b17ba16d 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -77,11 +77,14 @@ typedef struct DisasContext { /* Note that ssm/rsm instructions number PSW_W and PSW_E differently. */ static int expand_sm_imm(DisasContext *ctx, int val) { - if (val & PSW_SM_E) { - val = (val & ~PSW_SM_E) | PSW_E; - } - if (val & PSW_SM_W) { - val = (val & ~PSW_SM_W) | PSW_W; + /* Keep unimplemented bits disabled -- see cpu_hppa_put_psw. */ + if (ctx->is_pa20) { + if (val & PSW_SM_W) { + val |= PSW_W; + } + val &= ~(PSW_SM_W | PSW_SM_E | PSW_G); + } else { + val &= ~(PSW_SM_W | PSW_SM_E | PSW_O); } return val; }