hw/riscv/opentitan: Explicit machine type definition

Expand the DEFINE_MACHINE() macro, converting the class_init()
handler.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230520054510.68822-5-philmd@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Philippe Mathieu-Daudé 2023-05-20 07:45:09 +02:00 committed by Alistair Francis
parent 264495f948
commit 8696b74a6f
2 changed files with 9 additions and 4 deletions

View File

@ -108,8 +108,10 @@ static void opentitan_machine_init(MachineState *machine)
}
}
static void opentitan_machine_class_init(MachineClass *mc)
static void opentitan_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "RISC-V Board compatible with OpenTitan";
mc->init = opentitan_machine_init;
mc->max_cpus = 1;
@ -118,8 +120,6 @@ static void opentitan_machine_class_init(MachineClass *mc)
mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size;
}
DEFINE_MACHINE(TYPE_OPENTITAN_MACHINE, opentitan_machine_class_init)
static void lowrisc_ibex_soc_init(Object *obj)
{
LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj);
@ -327,6 +327,10 @@ static const TypeInfo open_titan_types[] = {
.instance_size = sizeof(LowRISCIbexSoCState),
.instance_init = lowrisc_ibex_soc_init,
.class_init = lowrisc_ibex_soc_class_init,
}, {
.name = TYPE_OPENTITAN_MACHINE,
.parent = TYPE_MACHINE,
.class_init = opentitan_machine_class_init,
}
};

View File

@ -24,6 +24,7 @@
#include "hw/char/ibex_uart.h"
#include "hw/timer/ibex_timer.h"
#include "hw/ssi/ibex_spi_host.h"
#include "hw/boards.h"
#include "qom/object.h"
#define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc"
@ -53,7 +54,7 @@ struct LowRISCIbexSoCState {
MemoryRegion flash_alias;
};
#define TYPE_OPENTITAN_MACHINE "opentitan"
#define TYPE_OPENTITAN_MACHINE MACHINE_TYPE_NAME("opentitan")
typedef struct OpenTitanState {
/*< private >*/