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ppc4xx: Introduce Ppc4xxSdramBank struct 

Instead of storing sdram bank parameters in unrelated arrays put them
in a struct so it's clear they belong to the same bank and simplify
the state struct using this bank type.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <5eb82d0424c584b2b9e6f7bc51560f8189ed21bb.1664021647.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
BALATON Zoltan 2022-09-24 14:27:51 +02:00 committed by Daniel Henrique Barboza
parent 1049ff55fe
commit 8626982301
3 changed files with 61 additions and 55 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

49
hw/ppc/ppc440_uc.c
View File

@ -16,7 +16,7 @@
#include "qemu/module.h" #include "qemu/module.h"
#include "hw/irq.h" #include "hw/irq.h"
#include "exec/memory.h" #include "exec/memory.h"
#include "hw/ppc/ppc.h" #include "hw/ppc/ppc4xx.h"
#include "hw/qdev-properties.h" #include "hw/qdev-properties.h"
#include "hw/pci/pci.h" #include "hw/pci/pci.h"
#include "sysemu/block-backend.h" #include "sysemu/block-backend.h"
@ -485,11 +485,7 @@ void ppc4xx_sdr_init(CPUPPCState *env)
typedef struct ppc440_sdram_t { typedef struct ppc440_sdram_t {
uint32_t addr; uint32_t addr;
int nbanks; int nbanks;
MemoryRegion containers[4]; /* used for clipping */ Ppc4xxSdramBank bank[4];
MemoryRegion *ram_memories;
hwaddr ram_bases[4];
hwaddr ram_sizes[4];
uint32_t bcr[4];
} ppc440_sdram_t; } ppc440_sdram_t;
enum { enum {
@ -570,23 +566,23 @@ static uint64_t sdram_size(uint32_t bcr)
static void sdram_set_bcr(ppc440_sdram_t *sdram, int i, static void sdram_set_bcr(ppc440_sdram_t *sdram, int i,
uint32_t bcr, int enabled) uint32_t bcr, int enabled)
{ {
if (sdram->bcr[i] & 1) { if (sdram->bank[i].bcr & 1) {
/* First unmap RAM if enabled */ /* First unmap RAM if enabled */
memory_region_del_subregion(get_system_memory(), memory_region_del_subregion(get_system_memory(),
&sdram->containers[i]); &sdram->bank[i].container);
memory_region_del_subregion(&sdram->containers[i], memory_region_del_subregion(&sdram->bank[i].container,
&sdram->ram_memories[i]); &sdram->bank[i].ram);
object_unparent(OBJECT(&sdram->containers[i])); object_unparent(OBJECT(&sdram->bank[i].container));
} }
sdram->bcr[i] = bcr & 0xffe0ffc1; sdram->bank[i].bcr = bcr & 0xffe0ffc1;
if (enabled && (bcr & 1)) { if (enabled && (bcr & 1)) {
memory_region_init(&sdram->containers[i], NULL, "sdram-containers", memory_region_init(&sdram->bank[i].container, NULL, "sdram-container",
sdram_size(bcr)); sdram_size(bcr));
memory_region_add_subregion(&sdram->containers[i], 0, memory_region_add_subregion(&sdram->bank[i].container, 0,
&sdram->ram_memories[i]); &sdram->bank[i].ram);
memory_region_add_subregion(get_system_memory(), memory_region_add_subregion(get_system_memory(),
sdram_base(bcr), sdram_base(bcr),
&sdram->containers[i]); &sdram->bank[i].container);
} }
} }
@ -595,9 +591,9 @@ static void sdram_map_bcr(ppc440_sdram_t *sdram)
int i; int i;
for (i = 0; i < sdram->nbanks; i++) { for (i = 0; i < sdram->nbanks; i++) {
if (sdram->ram_sizes[i] != 0) { if (sdram->bank[i].size != 0) {
sdram_set_bcr(sdram, i, sdram_bcr(sdram->ram_bases[i], sdram_set_bcr(sdram, i, sdram_bcr(sdram->bank[i].base,
sdram->ram_sizes[i]), 1); sdram->bank[i].size), 1);
} else { } else {
sdram_set_bcr(sdram, i, 0, 0); sdram_set_bcr(sdram, i, 0, 0);
} }
@ -614,9 +610,9 @@ static uint32_t dcr_read_sdram(void *opaque, int dcrn)
case SDRAM_R1BAS: case SDRAM_R1BAS:
case SDRAM_R2BAS: case SDRAM_R2BAS:
case SDRAM_R3BAS: case SDRAM_R3BAS:
if (sdram->ram_sizes[dcrn - SDRAM_R0BAS]) { if (sdram->bank[dcrn - SDRAM_R0BAS].size) {
ret = sdram_bcr(sdram->ram_bases[dcrn - SDRAM_R0BAS], ret = sdram_bcr(sdram->bank[dcrn - SDRAM_R0BAS].base,
sdram->ram_sizes[dcrn - SDRAM_R0BAS]); sdram->bank[dcrn - SDRAM_R0BAS].size);
} }
break; break;
case SDRAM_CONF1HB: case SDRAM_CONF1HB:
@ -701,12 +697,15 @@ void ppc440_sdram_init(CPUPPCState *env, int nbanks,
int do_init) int do_init)
{ {
ppc440_sdram_t *sdram; ppc440_sdram_t *sdram;
int i;
sdram = g_malloc0(sizeof(*sdram)); sdram = g_malloc0(sizeof(*sdram));
sdram->nbanks = nbanks; sdram->nbanks = nbanks;
sdram->ram_memories = ram_memories; for (i = 0; i < nbanks; i++) {
memcpy(sdram->ram_bases, ram_bases, nbanks * sizeof(hwaddr)); sdram->bank[i].ram = ram_memories[i];
memcpy(sdram->ram_sizes, ram_sizes, nbanks * sizeof(hwaddr)); sdram->bank[i].base = ram_bases[i];
sdram->bank[i].size = ram_sizes[i];
}
qemu_register_reset(&sdram_reset, sdram); qemu_register_reset(&sdram_reset, sdram);
ppc_dcr_register(env, SDRAM0_CFGADDR, ppc_dcr_register(env, SDRAM0_CFGADDR,
sdram, &dcr_read_sdram, &dcr_write_sdram); sdram, &dcr_read_sdram, &dcr_write_sdram);

59
hw/ppc/ppc4xx_devs.c
View File

@ -42,10 +42,7 @@ typedef struct ppc4xx_sdram_t ppc4xx_sdram_t;
struct ppc4xx_sdram_t { struct ppc4xx_sdram_t {
uint32_t addr; uint32_t addr;
int nbanks; int nbanks;
MemoryRegion containers[4]; /* used for clipping */ Ppc4xxSdramBank bank[4];
MemoryRegion *ram_memories;
hwaddr ram_bases[4];
hwaddr ram_sizes[4];
uint32_t besr0; uint32_t besr0;
uint32_t besr1; uint32_t besr1;
uint32_t bear; uint32_t bear;
@ -53,7 +50,6 @@ struct ppc4xx_sdram_t {
uint32_t status; uint32_t status;
uint32_t rtr; uint32_t rtr;
uint32_t pmit; uint32_t pmit;
uint32_t bcr[4];
uint32_t tr; uint32_t tr;
uint32_t ecccfg; uint32_t ecccfg;
uint32_t eccesr; uint32_t eccesr;
@ -131,26 +127,26 @@ static target_ulong sdram_size(uint32_t bcr)
static void sdram_set_bcr(ppc4xx_sdram_t *sdram, int i, static void sdram_set_bcr(ppc4xx_sdram_t *sdram, int i,
uint32_t bcr, int enabled) uint32_t bcr, int enabled)
{ {
if (sdram->bcr[i] & 0x00000001) { if (sdram->bank[i].bcr & 0x00000001) {
/* Unmap RAM */ /* Unmap RAM */
trace_ppc4xx_sdram_unmap(sdram_base(sdram->bcr[i]), trace_ppc4xx_sdram_unmap(sdram_base(sdram->bank[i].bcr),
sdram_size(sdram->bcr[i])); sdram_size(sdram->bank[i].bcr));
memory_region_del_subregion(get_system_memory(), memory_region_del_subregion(get_system_memory(),
&sdram->containers[i]); &sdram->bank[i].container);
memory_region_del_subregion(&sdram->containers[i], memory_region_del_subregion(&sdram->bank[i].container,
&sdram->ram_memories[i]); &sdram->bank[i].ram);
object_unparent(OBJECT(&sdram->containers[i])); object_unparent(OBJECT(&sdram->bank[i].container));
} }
sdram->bcr[i] = bcr & 0xFFDEE001; sdram->bank[i].bcr = bcr & 0xFFDEE001;
if (enabled && (bcr & 0x00000001)) { if (enabled && (bcr & 0x00000001)) {
trace_ppc4xx_sdram_map(sdram_base(bcr), sdram_size(bcr)); trace_ppc4xx_sdram_map(sdram_base(bcr), sdram_size(bcr));
memory_region_init(&sdram->containers[i], NULL, "sdram-containers", memory_region_init(&sdram->bank[i].container, NULL, "sdram-container",
sdram_size(bcr)); sdram_size(bcr));
memory_region_add_subregion(&sdram->containers[i], 0, memory_region_add_subregion(&sdram->bank[i].container, 0,
&sdram->ram_memories[i]); &sdram->bank[i].ram);
memory_region_add_subregion(get_system_memory(), memory_region_add_subregion(get_system_memory(),
sdram_base(bcr), sdram_base(bcr),
&sdram->containers[i]); &sdram->bank[i].container);
} }
} }
@ -159,9 +155,9 @@ static void sdram_map_bcr(ppc4xx_sdram_t *sdram)
int i; int i;
for (i = 0; i < sdram->nbanks; i++) { for (i = 0; i < sdram->nbanks; i++) {
if (sdram->ram_sizes[i] != 0) { if (sdram->bank[i].size != 0) {
sdram_set_bcr(sdram, i, sdram_bcr(sdram->ram_bases[i], sdram_set_bcr(sdram, i, sdram_bcr(sdram->bank[i].base,
sdram->ram_sizes[i]), 1); sdram->bank[i].size), 1);
} else { } else {
sdram_set_bcr(sdram, i, 0x00000000, 0); sdram_set_bcr(sdram, i, 0x00000000, 0);
} }
@ -173,10 +169,10 @@ static void sdram_unmap_bcr(ppc4xx_sdram_t *sdram)
int i; int i;
for (i = 0; i < sdram->nbanks; i++) { for (i = 0; i < sdram->nbanks; i++) {
trace_ppc4xx_sdram_unmap(sdram_base(sdram->bcr[i]), trace_ppc4xx_sdram_unmap(sdram_base(sdram->bank[i].bcr),
sdram_size(sdram->bcr[i])); sdram_size(sdram->bank[i].bcr));
memory_region_del_subregion(get_system_memory(), memory_region_del_subregion(get_system_memory(),
&sdram->ram_memories[i]); &sdram->bank[i].ram);
} }
} }
@ -214,16 +210,16 @@ static uint32_t dcr_read_sdram(void *opaque, int dcrn)
ret = sdram->pmit; ret = sdram->pmit;
break; break;
case 0x40: /* SDRAM_B0CR */ case 0x40: /* SDRAM_B0CR */
ret = sdram->bcr[0]; ret = sdram->bank[0].bcr;
break; break;
case 0x44: /* SDRAM_B1CR */ case 0x44: /* SDRAM_B1CR */
ret = sdram->bcr[1]; ret = sdram->bank[1].bcr;
break; break;
case 0x48: /* SDRAM_B2CR */ case 0x48: /* SDRAM_B2CR */
ret = sdram->bcr[2]; ret = sdram->bank[2].bcr;
break; break;
case 0x4C: /* SDRAM_B3CR */ case 0x4C: /* SDRAM_B3CR */
ret = sdram->bcr[3]; ret = sdram->bank[3].bcr;
break; break;
case 0x80: /* SDRAM_TR */ case 0x80: /* SDRAM_TR */
ret = -1; /* ? */ ret = -1; /* ? */
@ -358,13 +354,16 @@ void ppc4xx_sdram_init(CPUPPCState *env, qemu_irq irq, int nbanks,
int do_init) int do_init)
{ {
ppc4xx_sdram_t *sdram; ppc4xx_sdram_t *sdram;
int i;
sdram = g_new0(ppc4xx_sdram_t, 1); sdram = g_new0(ppc4xx_sdram_t, 1);
sdram->irq = irq; sdram->irq = irq;
sdram->nbanks = nbanks; sdram->nbanks = nbanks;
sdram->ram_memories = ram_memories; for (i = 0; i < nbanks; i++) {
memcpy(sdram->ram_bases, ram_bases, nbanks * sizeof(hwaddr)); sdram->bank[i].ram = ram_memories[i];
memcpy(sdram->ram_sizes, ram_sizes, nbanks * sizeof(hwaddr)); sdram->bank[i].base = ram_bases[i];
sdram->bank[i].size = ram_sizes[i];
}
qemu_register_reset(&sdram_reset, sdram); qemu_register_reset(&sdram_reset, sdram);
ppc_dcr_register(env, SDRAM0_CFGADDR, ppc_dcr_register(env, SDRAM0_CFGADDR,
sdram, &dcr_read_sdram, &dcr_write_sdram); sdram, &dcr_read_sdram, &dcr_write_sdram);

8
include/hw/ppc/ppc4xx.h
View File

@ -29,6 +29,14 @@
#include "exec/memory.h" #include "exec/memory.h"
#include "hw/sysbus.h" #include "hw/sysbus.h"
typedef struct {
MemoryRegion ram;
MemoryRegion container; /* used for clipping */
hwaddr base;
hwaddr size;
uint32_t bcr;
} Ppc4xxSdramBank;
void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks, void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
MemoryRegion ram_memories[], MemoryRegion ram_memories[],
hwaddr ram_bases[], hwaddr ram_sizes[], hwaddr ram_bases[], hwaddr ram_sizes[],