mirror of https://github.com/xemu-project/xemu.git
target/mips: Move IEEE rounding mode array to new source file
restore_msa_fp_status() is declared inlined in fpu_helper.h, and uses the ieee_rm[] array. Therefore any code calling restore_msa_fp_status() must have access to this ieee_rm[] array. kvm_mips_get_fpu_registers(), which is in target/mips/kvm.c, calls restore_msa_fp_status. Except this tiny array, the rest of fpu_helper.c is only useful for the TCG accelerator. To be able to restrict fpu_helper.c to TCG, we need to move the ieee_rm[] array to a new source file. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-3-f4bug@amsat.org>
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@ -0,0 +1,18 @@
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/*
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* Helpers for emulation of FPU-related MIPS instructions.
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*
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* Copyright (C) 2004-2005 Jocelyn Mayer
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*
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* SPDX-License-Identifier: LGPL-2.1-or-later
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*/
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#include "qemu/osdep.h"
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#include "fpu/softfloat-helpers.h"
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#include "fpu_helper.h"
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/* convert MIPS rounding mode in FCR31 to IEEE library */
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const FloatRoundMode ieee_rm[4] = {
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float_round_nearest_even,
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float_round_to_zero,
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float_round_up,
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float_round_down
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};
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@ -38,14 +38,6 @@
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#define FP_TO_INT32_OVERFLOW 0x7fffffff
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#define FP_TO_INT32_OVERFLOW 0x7fffffff
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#define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
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#define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
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/* convert MIPS rounding mode in FCR31 to IEEE library */
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const FloatRoundMode ieee_rm[4] = {
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float_round_nearest_even,
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float_round_to_zero,
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float_round_up,
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float_round_down
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};
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target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg)
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target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg)
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{
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{
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target_ulong arg1 = 0;
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target_ulong arg1 = 0;
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@ -9,6 +9,7 @@ gen = [
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mips_ss = ss.source_set()
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mips_ss = ss.source_set()
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mips_ss.add(files(
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mips_ss.add(files(
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'cpu.c',
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'cpu.c',
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'fpu.c',
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'gdbstub.c',
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'gdbstub.c',
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))
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))
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mips_tcg_ss = ss.source_set()
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mips_tcg_ss = ss.source_set()
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