mirror of https://github.com/xemu-project/xemu.git
hw/timer/aspeed: Fix coding style
Fix coding style issues from checkpatch.pl Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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@ -276,7 +276,8 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,
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old_reload = t->reload;
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t->reload = calculate_min_ticks(t, value);
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/* If the reload value was not previously set, or zero, and
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/*
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* If the reload value was not previously set, or zero, and
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* the current value is valid, try to start the timer if it is
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* enabled.
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*/
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@ -312,7 +313,8 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState *s, int timer, int reg,
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}
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}
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/* Control register operations are broken out into helpers that can be
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/*
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* Control register operations are broken out into helpers that can be
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* explicitly called on aspeed_timer_reset(), but also from
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* aspeed_timer_ctrl_op().
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*/
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@ -396,7 +398,8 @@ static void aspeed_timer_set_ctrl(AspeedTimerCtrlState *s, uint32_t reg)
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AspeedTimer *t;
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const uint8_t enable_mask = BIT(op_enable);
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/* Handle a dependency between the 'enable' and remaining three
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/*
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* Handle a dependency between the 'enable' and remaining three
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* configuration bits - i.e. if more than one bit in the control set has
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* changed, including the 'enable' bit, then we want either disable the
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* timer and perform configuration, or perform configuration and then
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@ -582,7 +585,6 @@ static void aspeed_2600_timer_write(AspeedTimerCtrlState *s, hwaddr offset,
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case 0x3C:
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aspeed_timer_set_ctrl(s, s->ctrl & ~tv);
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break;
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case 0x38:
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIx "\n",
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@ -623,7 +625,8 @@ static void aspeed_timer_reset(DeviceState *dev)
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for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
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AspeedTimer *t = &s->timers[i];
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/* Explicitly call helpers to avoid any conditional behaviour through
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/*
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* Explicitly call helpers to avoid any conditional behaviour through
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* aspeed_timer_set_ctrl().
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*/
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aspeed_timer_ctrl_enable(t, false);
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