mirror of https://github.com/xemu-project/xemu.git
target/i386: Refactored intercept checks into cpu_svm_has_intercept
Added cpu_svm_has_intercept to reduce duplication when checking the corresponding intercept bit outside of cpu_svm_check_intercept_param Signed-off-by: Lara Lazier <laramglazier@gmail.com> Message-Id: <20210616123907.17765-2-laramglazier@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -2149,9 +2149,13 @@ static inline void
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cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type,
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cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type,
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uint64_t param, uintptr_t retaddr)
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uint64_t param, uintptr_t retaddr)
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{ /* no-op */ }
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{ /* no-op */ }
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static inline bool
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cpu_svm_has_intercept(CPUX86State *env, uint32_t type)
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{ return false; }
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#else
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#else
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void cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type,
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void cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type,
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uint64_t param, uintptr_t retaddr);
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uint64_t param, uintptr_t retaddr);
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bool cpu_svm_has_intercept(CPUX86State *env, uint32_t type);
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#endif
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#endif
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/* apic.c */
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/* apic.c */
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@ -412,6 +412,43 @@ void helper_clgi(CPUX86State *env)
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env->hflags2 &= ~HF2_GIF_MASK;
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env->hflags2 &= ~HF2_GIF_MASK;
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}
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}
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bool cpu_svm_has_intercept(CPUX86State *env, uint32_t type)
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{
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switch (type) {
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case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8:
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if (env->intercept_cr_read & (1 << (type - SVM_EXIT_READ_CR0))) {
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return true;
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}
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break;
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case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8:
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if (env->intercept_cr_write & (1 << (type - SVM_EXIT_WRITE_CR0))) {
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return true;
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}
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break;
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case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 7:
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if (env->intercept_dr_read & (1 << (type - SVM_EXIT_READ_DR0))) {
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return true;
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}
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break;
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case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 7:
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if (env->intercept_dr_write & (1 << (type - SVM_EXIT_WRITE_DR0))) {
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return true;
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}
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break;
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case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 31:
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if (env->intercept_exceptions & (1 << (type - SVM_EXIT_EXCP_BASE))) {
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return true;
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}
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break;
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default:
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if (env->intercept & (1ULL << (type - SVM_EXIT_INTR))) {
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return true;
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}
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break;
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}
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return false;
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}
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void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type,
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void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type,
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uint64_t param, uintptr_t retaddr)
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uint64_t param, uintptr_t retaddr)
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{
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{
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@ -420,72 +457,46 @@ void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type,
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if (likely(!(env->hflags & HF_GUEST_MASK))) {
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if (likely(!(env->hflags & HF_GUEST_MASK))) {
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return;
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return;
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}
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}
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switch (type) {
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case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8:
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if (env->intercept_cr_read & (1 << (type - SVM_EXIT_READ_CR0))) {
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cpu_vmexit(env, type, param, retaddr);
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}
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break;
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case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8:
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if (env->intercept_cr_write & (1 << (type - SVM_EXIT_WRITE_CR0))) {
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cpu_vmexit(env, type, param, retaddr);
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}
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break;
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case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 7:
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if (env->intercept_dr_read & (1 << (type - SVM_EXIT_READ_DR0))) {
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cpu_vmexit(env, type, param, retaddr);
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}
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break;
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case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 7:
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if (env->intercept_dr_write & (1 << (type - SVM_EXIT_WRITE_DR0))) {
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cpu_vmexit(env, type, param, retaddr);
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}
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break;
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case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 31:
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if (env->intercept_exceptions & (1 << (type - SVM_EXIT_EXCP_BASE))) {
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cpu_vmexit(env, type, param, retaddr);
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}
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break;
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case SVM_EXIT_MSR:
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if (env->intercept & (1ULL << (SVM_EXIT_MSR - SVM_EXIT_INTR))) {
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/* FIXME: this should be read in at vmrun (faster this way?) */
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uint64_t addr = x86_ldq_phys(cs, env->vm_vmcb +
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offsetof(struct vmcb,
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control.msrpm_base_pa));
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uint32_t t0, t1;
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switch ((uint32_t)env->regs[R_ECX]) {
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if (!cpu_svm_has_intercept(env, type)) {
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case 0 ... 0x1fff:
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return;
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t0 = (env->regs[R_ECX] * 2) % 8;
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}
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t1 = (env->regs[R_ECX] * 2) / 8;
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break;
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if (type == SVM_EXIT_MSR) {
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case 0xc0000000 ... 0xc0001fff:
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/* FIXME: this should be read in at vmrun (faster this way?) */
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t0 = (8192 + env->regs[R_ECX] - 0xc0000000) * 2;
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uint64_t addr = x86_ldq_phys(cs, env->vm_vmcb +
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t1 = (t0 / 8);
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offsetof(struct vmcb,
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t0 %= 8;
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control.msrpm_base_pa));
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break;
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uint32_t t0, t1;
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case 0xc0010000 ... 0xc0011fff:
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t0 = (16384 + env->regs[R_ECX] - 0xc0010000) * 2;
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switch ((uint32_t)env->regs[R_ECX]) {
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t1 = (t0 / 8);
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case 0 ... 0x1fff:
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t0 %= 8;
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t0 = (env->regs[R_ECX] * 2) % 8;
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break;
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t1 = (env->regs[R_ECX] * 2) / 8;
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default:
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break;
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cpu_vmexit(env, type, param, retaddr);
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case 0xc0000000 ... 0xc0001fff:
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t0 = 0;
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t0 = (8192 + env->regs[R_ECX] - 0xc0000000) * 2;
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t1 = 0;
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t1 = (t0 / 8);
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break;
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t0 %= 8;
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}
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break;
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if (x86_ldub_phys(cs, addr + t1) & ((1 << param) << t0)) {
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case 0xc0010000 ... 0xc0011fff:
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cpu_vmexit(env, type, param, retaddr);
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t0 = (16384 + env->regs[R_ECX] - 0xc0010000) * 2;
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}
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t1 = (t0 / 8);
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t0 %= 8;
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break;
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default:
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cpu_vmexit(env, type, param, retaddr);
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t0 = 0;
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t1 = 0;
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break;
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}
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}
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break;
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if (x86_ldub_phys(cs, addr + t1) & ((1 << param) << t0)) {
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default:
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if (env->intercept & (1ULL << (type - SVM_EXIT_INTR))) {
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cpu_vmexit(env, type, param, retaddr);
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cpu_vmexit(env, type, param, retaddr);
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}
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}
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break;
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return;
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}
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}
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cpu_vmexit(env, type, param, retaddr);
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}
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}
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void helper_svm_check_intercept(CPUX86State *env, uint32_t type)
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void helper_svm_check_intercept(CPUX86State *env, uint32_t type)
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