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tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation 

Similar to the same fix for user-mode, except this instance
occurs on the softmmu path.  Again, the tlb addend must be
the base register, while the guest address is the index.

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2015-07-23 18:04:52 -04:00
parent ffc6372851
commit 80adb8fcad
1 changed files with 6 additions and 6 deletions
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12
tcg/aarch64/tcg-target.c
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@ -1204,18 +1204,18 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
TCGMemOpIdx oi, TCGType ext) TCGMemOpIdx oi, TCGType ext)
{ {
TCGMemOp memop = get_memop(oi); TCGMemOp memop = get_memop(oi);
const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
#ifdef CONFIG_SOFTMMU #ifdef CONFIG_SOFTMMU
unsigned mem_index = get_mmuidx(oi); unsigned mem_index = get_mmuidx(oi);
TCGMemOp s_bits = memop & MO_SIZE; TCGMemOp s_bits = memop & MO_SIZE;
tcg_insn_unit *label_ptr; tcg_insn_unit *label_ptr;
tcg_out_tlb_read(s, addr_reg, s_bits, &label_ptr, mem_index, 1); tcg_out_tlb_read(s, addr_reg, s_bits, &label_ptr, mem_index, 1);
tcg_out_qemu_ld_direct(s, memop, ext, data_reg, addr_reg, tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
TCG_TYPE_I64, TCG_REG_X1); TCG_REG_X1, otype, addr_reg);
add_qemu_ldst_label(s, true, oi, ext, data_reg, addr_reg, add_qemu_ldst_label(s, true, oi, ext, data_reg, addr_reg,
s->code_ptr, label_ptr); s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */ #else /* !CONFIG_SOFTMMU */
const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
tcg_out_qemu_ld_direct(s, memop, ext, data_reg, tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR, GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
otype, addr_reg); otype, addr_reg);
@ -1226,18 +1226,18 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
TCGMemOpIdx oi) TCGMemOpIdx oi)
{ {
TCGMemOp memop = get_memop(oi); TCGMemOp memop = get_memop(oi);
const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
#ifdef CONFIG_SOFTMMU #ifdef CONFIG_SOFTMMU
unsigned mem_index = get_mmuidx(oi); unsigned mem_index = get_mmuidx(oi);
TCGMemOp s_bits = memop & MO_SIZE; TCGMemOp s_bits = memop & MO_SIZE;
tcg_insn_unit *label_ptr; tcg_insn_unit *label_ptr;
tcg_out_tlb_read(s, addr_reg, s_bits, &label_ptr, mem_index, 0); tcg_out_tlb_read(s, addr_reg, s_bits, &label_ptr, mem_index, 0);
tcg_out_qemu_st_direct(s, memop, data_reg, addr_reg, tcg_out_qemu_st_direct(s, memop, data_reg,
TCG_TYPE_I64, TCG_REG_X1); TCG_REG_X1, otype, addr_reg);
add_qemu_ldst_label(s, false, oi, s_bits == MO_64, data_reg, addr_reg, add_qemu_ldst_label(s, false, oi, s_bits == MO_64, data_reg, addr_reg,
s->code_ptr, label_ptr); s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */ #else /* !CONFIG_SOFTMMU */
const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
tcg_out_qemu_st_direct(s, memop, data_reg, tcg_out_qemu_st_direct(s, memop, data_reg,
GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR, GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
otype, addr_reg); otype, addr_reg);