mirror of https://github.com/xemu-project/xemu.git
target/arm: Use extract2 for EXTR
This is, after all, how we implement extract2 in tcg/aarch64. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190514011129.11330-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -4114,25 +4114,27 @@ static void disas_extract(DisasContext *s, uint32_t insn)
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} else {
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tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rm));
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}
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} else if (rm == rn) { /* ROR */
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tcg_rm = cpu_reg(s, rm);
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if (sf) {
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tcg_gen_rotri_i64(tcg_rd, tcg_rm, imm);
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} else {
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TCGv_i32 tmp = tcg_temp_new_i32();
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tcg_gen_extrl_i64_i32(tmp, tcg_rm);
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tcg_gen_rotri_i32(tmp, tmp, imm);
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tcg_gen_extu_i32_i64(tcg_rd, tmp);
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tcg_temp_free_i32(tmp);
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}
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} else {
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tcg_rm = read_cpu_reg(s, rm, sf);
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tcg_rn = read_cpu_reg(s, rn, sf);
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tcg_gen_shri_i64(tcg_rm, tcg_rm, imm);
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tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm);
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tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn);
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if (!sf) {
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tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
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tcg_rm = cpu_reg(s, rm);
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tcg_rn = cpu_reg(s, rn);
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if (sf) {
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/* Specialization to ROR happens in EXTRACT2. */
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tcg_gen_extract2_i64(tcg_rd, tcg_rm, tcg_rn, imm);
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} else {
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TCGv_i32 t0 = tcg_temp_new_i32();
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tcg_gen_extrl_i64_i32(t0, tcg_rm);
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if (rm == rn) {
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tcg_gen_rotri_i32(t0, t0, imm);
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} else {
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TCGv_i32 t1 = tcg_temp_new_i32();
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tcg_gen_extrl_i64_i32(t1, tcg_rn);
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tcg_gen_extract2_i32(t0, t0, t1, imm);
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tcg_temp_free_i32(t1);
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}
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tcg_gen_extu_i32_i64(tcg_rd, t0);
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tcg_temp_free_i32(t0);
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}
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}
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}
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