mirror of https://github.com/xemu-project/xemu.git
target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset
Move the OMAP-specific cp15_i_{max,min} reset to cpu_state_reset; since these registers are only accessible on CPUs with the OMAPCP feature set there's no need to guard this reset with either a CPUID or feature bit check. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
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@ -47,8 +47,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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break;
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case ARM_CPUID_TI915T:
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case ARM_CPUID_TI925T:
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env->cp15.c15_i_max = 0x000;
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env->cp15.c15_i_min = 0xff0;
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break;
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case ARM_CPUID_PXA250:
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case ARM_CPUID_PXA255:
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@ -114,6 +112,7 @@ void cpu_state_reset(CPUARMState *env)
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env->cp15.c0_c2[3] = cpu->id_isar3;
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env->cp15.c0_c2[4] = cpu->id_isar4;
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env->cp15.c0_c2[5] = cpu->id_isar5;
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env->cp15.c15_i_min = 0xff0;
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if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
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env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
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