ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Name the magic constants, use correct value for AUX2_PWRFAIL 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3754 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2007-12-01 14:53:22 +00:00
parent 498fbd8aad
commit 7debeb82ff
1 changed files with 51 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

83
hw/slavio_misc.c
View File

@ -58,11 +58,30 @@ typedef struct MiscState {
#define LED_MAXADDR 2 #define LED_MAXADDR 2
#define LED_SIZE (LED_MAXADDR + 1) #define LED_SIZE (LED_MAXADDR + 1)
#define MISC_MASK 0x0fff0000
#define MISC_LEDS 0x01600000
#define MISC_CFG 0x01800000
#define MISC_AUX1 0x01900000
#define MISC_AUX2 0x01910000
#define MISC_DIAG 0x01a00000
#define MISC_MDM 0x01b00000
#define MISC_SYS 0x01f00000
#define MISC_PWR 0x0a000000
#define AUX2_PWROFF 0x01
#define AUX2_PWRINTCLR 0x02
#define AUX2_PWRFAIL 0x20
#define CFG_PWRINTEN 0x08
#define SYS_RESET 0x01
#define SYS_RESETSTAT 0x02
static void slavio_misc_update_irq(void *opaque) static void slavio_misc_update_irq(void *opaque)
{ {
MiscState *s = opaque; MiscState *s = opaque;
if ((s->aux2 & 0x4) && (s->config & 0x8)) { if ((s->aux2 & AUX2_PWRFAIL) && (s->config & CFG_PWRINTEN)) {
MISC_DPRINTF("Raise IRQ\n"); MISC_DPRINTF("Raise IRQ\n");
qemu_irq_raise(s->irq); qemu_irq_raise(s->irq);
} else { } else {
@ -84,10 +103,10 @@ void slavio_set_power_fail(void *opaque, int power_failing)
MiscState *s = opaque; MiscState *s = opaque;
MISC_DPRINTF("Power fail: %d, config: %d\n", power_failing, s->config); MISC_DPRINTF("Power fail: %d, config: %d\n", power_failing, s->config);
if (power_failing && (s->config & 0x8)) { if (power_failing && (s->config & CFG_PWRINTEN)) {
s->aux2 |= 0x4; s->aux2 |= AUX2_PWRFAIL;
} else { } else {
s->aux2 &= ~0x4; s->aux2 &= ~AUX2_PWRFAIL;
} }
slavio_misc_update_irq(s); slavio_misc_update_irq(s);
} }
@ -97,36 +116,36 @@ static void slavio_misc_mem_writeb(void *opaque, target_phys_addr_t addr,
{ {
MiscState *s = opaque; MiscState *s = opaque;
switch (addr & 0xfff0000) { switch (addr & MISC_MASK) {
case 0x1800000: case MISC_CFG:
MISC_DPRINTF("Write config %2.2x\n", val & 0xff); MISC_DPRINTF("Write config %2.2x\n", val & 0xff);
s->config = val & 0xff; s->config = val & 0xff;
slavio_misc_update_irq(s); slavio_misc_update_irq(s);
break; break;
case 0x1900000: case MISC_AUX1:
MISC_DPRINTF("Write aux1 %2.2x\n", val & 0xff); MISC_DPRINTF("Write aux1 %2.2x\n", val & 0xff);
s->aux1 = val & 0xff; s->aux1 = val & 0xff;
break; break;
case 0x1910000: case MISC_AUX2:
val &= 0x3; val &= AUX2_PWRINTCLR | AUX2_PWROFF;
MISC_DPRINTF("Write aux2 %2.2x\n", val); MISC_DPRINTF("Write aux2 %2.2x\n", val);
val |= s->aux2 & 0x4; val |= s->aux2 & AUX2_PWRFAIL;
if (val & 0x2) // Clear Power Fail int if (val & AUX2_PWRINTCLR) // Clear Power Fail int
val &= 0x1; val &= AUX2_PWROFF;
s->aux2 = val; s->aux2 = val;
if (val & 1) if (val & AUX2_PWROFF)
qemu_system_shutdown_request(); qemu_system_shutdown_request();
slavio_misc_update_irq(s); slavio_misc_update_irq(s);
break; break;
case 0x1a00000: case MISC_DIAG:
MISC_DPRINTF("Write diag %2.2x\n", val & 0xff); MISC_DPRINTF("Write diag %2.2x\n", val & 0xff);
s->diag = val & 0xff; s->diag = val & 0xff;
break; break;
case 0x1b00000: case MISC_MDM:
MISC_DPRINTF("Write modem control %2.2x\n", val & 0xff); MISC_DPRINTF("Write modem control %2.2x\n", val & 0xff);
s->mctrl = val & 0xff; s->mctrl = val & 0xff;
break; break;
case 0xa000000: case MISC_PWR:
MISC_DPRINTF("Write power management %2.2x\n", val & 0xff); MISC_DPRINTF("Write power management %2.2x\n", val & 0xff);
cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT); cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT);
break; break;
@ -138,28 +157,28 @@ static uint32_t slavio_misc_mem_readb(void *opaque, target_phys_addr_t addr)
MiscState *s = opaque; MiscState *s = opaque;
uint32_t ret = 0; uint32_t ret = 0;
switch (addr & 0xfff0000) { switch (addr & MISC_MASK) {
case 0x1800000: case MISC_CFG:
ret = s->config; ret = s->config;
MISC_DPRINTF("Read config %2.2x\n", ret); MISC_DPRINTF("Read config %2.2x\n", ret);
break; break;
case 0x1900000: case MISC_AUX1:
ret = s->aux1; ret = s->aux1;
MISC_DPRINTF("Read aux1 %2.2x\n", ret); MISC_DPRINTF("Read aux1 %2.2x\n", ret);
break; break;
case 0x1910000: case MISC_AUX2:
ret = s->aux2; ret = s->aux2;
MISC_DPRINTF("Read aux2 %2.2x\n", ret); MISC_DPRINTF("Read aux2 %2.2x\n", ret);
break; break;
case 0x1a00000: case MISC_DIAG:
ret = s->diag; ret = s->diag;
MISC_DPRINTF("Read diag %2.2x\n", ret); MISC_DPRINTF("Read diag %2.2x\n", ret);
break; break;
case 0x1b00000: case MISC_MDM:
ret = s->mctrl; ret = s->mctrl;
MISC_DPRINTF("Read modem control %2.2x\n", ret); MISC_DPRINTF("Read modem control %2.2x\n", ret);
break; break;
case 0xa000000: case MISC_PWR:
MISC_DPRINTF("Read power management %2.2x\n", ret); MISC_DPRINTF("Read power management %2.2x\n", ret);
break; break;
} }
@ -207,8 +226,8 @@ static void slavio_sysctrl_mem_writel(void *opaque, target_phys_addr_t addr,
val); val);
switch (saddr) { switch (saddr) {
case 0: case 0:
if (val & 1) { if (val & SYS_RESET) {
s->sysctrl = 0x2; s->sysctrl = SYS_RESETSTAT;
qemu_system_reset_request(); qemu_system_reset_request();
} }
break; break;
@ -328,19 +347,19 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
slavio_misc_io_memory = cpu_register_io_memory(0, slavio_misc_mem_read, slavio_misc_io_memory = cpu_register_io_memory(0, slavio_misc_mem_read,
slavio_misc_mem_write, s); slavio_misc_mem_write, s);
// Slavio control // Slavio control
cpu_register_physical_memory(base + 0x1800000, MISC_SIZE, cpu_register_physical_memory(base + MISC_CFG, MISC_SIZE,
slavio_misc_io_memory); slavio_misc_io_memory);
// AUX 1 // AUX 1
cpu_register_physical_memory(base + 0x1900000, MISC_SIZE, cpu_register_physical_memory(base + MISC_AUX1, MISC_SIZE,
slavio_misc_io_memory); slavio_misc_io_memory);
// AUX 2 // AUX 2
cpu_register_physical_memory(base + 0x1910000, MISC_SIZE, cpu_register_physical_memory(base + MISC_AUX2, MISC_SIZE,
slavio_misc_io_memory); slavio_misc_io_memory);
// Diagnostics // Diagnostics
cpu_register_physical_memory(base + 0x1a00000, MISC_SIZE, cpu_register_physical_memory(base + MISC_DIAG, MISC_SIZE,
slavio_misc_io_memory); slavio_misc_io_memory);
// Modem control // Modem control
cpu_register_physical_memory(base + 0x1b00000, MISC_SIZE, cpu_register_physical_memory(base + MISC_MDM, MISC_SIZE,
slavio_misc_io_memory); slavio_misc_io_memory);
// Power management // Power management
cpu_register_physical_memory(power_base, MISC_SIZE, slavio_misc_io_memory); cpu_register_physical_memory(power_base, MISC_SIZE, slavio_misc_io_memory);
@ -349,7 +368,7 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
slavio_misc_io_memory = cpu_register_io_memory(0, slavio_led_mem_read, slavio_misc_io_memory = cpu_register_io_memory(0, slavio_led_mem_read,
slavio_led_mem_write, s); slavio_led_mem_write, s);
/* ss600mp diag LEDs */ /* ss600mp diag LEDs */
cpu_register_physical_memory(base + 0x1600000, MISC_SIZE, cpu_register_physical_memory(base + MISC_LEDS, MISC_SIZE,
slavio_misc_io_memory); slavio_misc_io_memory);
/* 32 bit registers */ /* 32 bit registers */
@ -357,7 +376,7 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
slavio_sysctrl_mem_write, slavio_sysctrl_mem_write,
s); s);
// System control // System control
cpu_register_physical_memory(base + 0x1f00000, SYSCTRL_SIZE, cpu_register_physical_memory(base + MISC_SYS, SYSCTRL_SIZE,
slavio_misc_io_memory); slavio_misc_io_memory);
s->irq = irq; s->irq = irq;