ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

target/sparc: Implement PDISTN 

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-11-04 18:16:44 -07:00
parent 09b157e628
commit 7d5ebd8ffe
2 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target/sparc/insns.decode
View File

@ -435,6 +435,7 @@ FCMPEq 10 000 cc:2 110101 ..... 0 0101 0111 ..... \
FPACKFIX 10 ..... 110110 00000 0 0011 1101 ..... @r_d2 FPACKFIX 10 ..... 110110 00000 0 0011 1101 ..... @r_d2
PDIST 10 ..... 110110 ..... 0 0011 1110 ..... \ PDIST 10 ..... 110110 ..... 0 0011 1110 ..... \
&r_r_r_r rd=%dfp_rd rs1=%dfp_rd rs2=%dfp_rs1 rs3=%dfp_rs2 &r_r_r_r rd=%dfp_rd rs1=%dfp_rd rs2=%dfp_rs1 rs3=%dfp_rs2
PDISTN 10 ..... 110110 ..... 0 0011 1111 ..... @r_d_d
FMEAN16 10 ..... 110110 ..... 0 0100 0000 ..... @d_d_d FMEAN16 10 ..... 110110 ..... 0 0100 0000 ..... @d_d_d
FCHKSM16 10 ..... 110110 ..... 0 0100 0100 ..... @d_d_d FCHKSM16 10 ..... 110110 ..... 0 0100 0100 ..... @d_d_d

11
target/sparc/translate.c
View File

@ -817,6 +817,15 @@ static void gen_op_bshuffle(TCGv_i64 dst, TCGv_i64 src1, TCGv_i64 src2)
#endif #endif
} }
static void gen_op_pdistn(TCGv dst, TCGv_i64 src1, TCGv_i64 src2)
{
#ifdef TARGET_SPARC64
gen_helper_pdist(dst, tcg_constant_i64(0), src1, src2);
#else
g_assert_not_reached();
#endif
}
static void gen_op_fmul8x16al(TCGv_i64 dst, TCGv_i32 src1, TCGv_i32 src2) static void gen_op_fmul8x16al(TCGv_i64 dst, TCGv_i32 src1, TCGv_i32 src2)
{ {
tcg_gen_ext16s_i32(src2, src2); tcg_gen_ext16s_i32(src2, src2);
@ -5070,6 +5079,8 @@ TRANS(FPCMPNE8, VIS3B, do_rdd, a, gen_helper_fcmpne8)
TRANS(FPCMPULE8, VIS3B, do_rdd, a, gen_helper_fcmpule8) TRANS(FPCMPULE8, VIS3B, do_rdd, a, gen_helper_fcmpule8)
TRANS(FPCMPUGT8, VIS3B, do_rdd, a, gen_helper_fcmpugt8) TRANS(FPCMPUGT8, VIS3B, do_rdd, a, gen_helper_fcmpugt8)
TRANS(PDISTN, VIS3, do_rdd, a, gen_op_pdistn)
static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a, static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a,
void (*func)(TCGv_i64, TCGv_env, TCGv_i64, TCGv_i64)) void (*func)(TCGv_i64, TCGv_env, TCGv_i64, TCGv_i64))
{ {