mirror of https://github.com/xemu-project/xemu.git
Fix compilation on Sparc host, implement ld and st
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4457 c046a42c-6fe2-441c-8c8c-71466251a162
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2e56350ef1
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@ -53,19 +53,14 @@ static unsigned long next_tb;
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// Work around ugly bugs in glibc that mangle global register contents
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// Work around ugly bugs in glibc that mangle global register contents
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static volatile void *saved_env;
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static volatile void *saved_env;
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static volatile unsigned long saved_t0, saved_i7;
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#undef SAVE_GLOBALS
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#undef SAVE_GLOBALS
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#define SAVE_GLOBALS() do { \
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#define SAVE_GLOBALS() do { \
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saved_env = env; \
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saved_env = env; \
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saved_t0 = T0; \
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asm volatile ("st %%i7, [%0]" : : "r" (&saved_i7)); \
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} while(0)
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} while(0)
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#undef RESTORE_GLOBALS
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#undef RESTORE_GLOBALS
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#define RESTORE_GLOBALS() do { \
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#define RESTORE_GLOBALS() do { \
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env = (void *)saved_env; \
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env = (void *)saved_env; \
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T0 = saved_t0; \
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asm volatile ("ld [%0], %%i7" : : "r" (&saved_i7)); \
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} while(0)
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} while(0)
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static int sparc_setjmp(jmp_buf buf)
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static int sparc_setjmp(jmp_buf buf)
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@ -266,13 +266,19 @@ static inline void tcg_out_ldst(TCGContext *s, int ret, int addr, int offset, in
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static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
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static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
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int arg1, tcg_target_long arg2)
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int arg1, tcg_target_long arg2)
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{
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{
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fprintf(stderr, "unimplemented %s\n", __func__);
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if (type == TCG_TYPE_I32)
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tcg_out_ldst(s, ret, arg1, arg2, LDUW);
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else
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tcg_out_ldst(s, ret, arg1, arg2, LDX);
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}
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}
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static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
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static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
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int arg1, tcg_target_long arg2)
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int arg1, tcg_target_long arg2)
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{
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{
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fprintf(stderr, "unimplemented %s\n", __func__);
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if (type == TCG_TYPE_I32)
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tcg_out_ldst(s, arg, arg1, arg2, STW);
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else
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tcg_out_ldst(s, arg, arg1, arg2, STX);
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}
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}
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static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2,
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static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2,
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@ -312,10 +318,14 @@ static inline void tcg_out_nop(TCGContext *s)
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tcg_out32(s, SETHI | INSN_RD(TCG_REG_G0) | 0);
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tcg_out32(s, SETHI | INSN_RD(TCG_REG_G0) | 0);
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}
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}
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static inline void tcg_target_prologue(TCGContext *s)
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/* Generate global QEMU prologue and epilogue code */
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void tcg_target_qemu_prologue(TCGContext *s)
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{
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{
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tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) |
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tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) |
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INSN_IMM13(-TCG_TARGET_STACK_MINFRAME));
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INSN_IMM13(-TCG_TARGET_STACK_MINFRAME));
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tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_O0) |
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INSN_RS2(TCG_REG_G0));
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tcg_out_nop(s);
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}
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}
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static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
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@ -84,8 +84,9 @@ enum {
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/* optional instructions */
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/* optional instructions */
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//#define TCG_TARGET_HAS_bswap_i32
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//#define TCG_TARGET_HAS_bswap_i32
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//#define TCG_TARGET_HAS_bswap_i64
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//#define TCG_TARGET_HAS_bswap_i64
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//#define TCG_TARGET_HAS_neg_i32
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//#define TCG_TARGET_HAS_neg_i64
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#define TCG_TARGET_NEEDS_PROLOGUE 1
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/* Note: must be synced with dyngen-exec.h */
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/* Note: must be synced with dyngen-exec.h */
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#ifdef HOST_SOLARIS
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#ifdef HOST_SOLARIS
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