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target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl) 

Use the new 'vlenb' CPU config to validate fractional LMUL. The original
comparison is done with 'vlen' and 'sew', both in bits. Adjust the shift
to use vlenb.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240122161107.26737-9-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2024-01-22 13:11:02 -03:00 committed by Alistair Francis
parent 58bc9063ec
commit 7aa4d519cb
1 changed files with 9 additions and 2 deletions
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11
target/riscv/vector_helper.c
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@ -45,9 +45,16 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,
xlen - 1 - R_VTYPE_RESERVED_SHIFT);
if (lmul & 4) {
/* Fractional LMUL - check LMUL * VLEN >= SEW */
/*
* Fractional LMUL, check:
*
* VLEN * LMUL >= SEW
* VLEN >> (8 - lmul) >= sew
* (vlenb << 3) >> (8 - lmul) >= sew
* vlenb >> (8 - 3 - lmul) >= sew
*/
if (lmul == 4 ||
cpu->cfg.vlen >> (8 - lmul) < sew) {
cpu->cfg.vlenb >> (8 - 3 - lmul) < sew) {
vill = true;
}
}