ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

hw/char: cadence_uart: Convert to memop_with_attrs() ops 

This converts uart_read() and uart_write() to memop_with_attrs() ops.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210901124521.30599-5-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Bin Meng 2021-09-13 16:07:21 +01:00 committed by Peter Maydell
parent 983f4adf36
commit 7956a8f5dd
1 changed files with 15 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
hw/char/cadence_uart.c
View File

@ -411,15 +411,15 @@ static void uart_read_rx_fifo(CadenceUARTState *s, uint32_t *c)
uart_update_status(s); uart_update_status(s);
} }
static void uart_write(void *opaque, hwaddr offset, static MemTxResult uart_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size) uint64_t value, unsigned size, MemTxAttrs attrs)
{ {
CadenceUARTState *s = opaque; CadenceUARTState *s = opaque;
DB_PRINT(" offset:%x data:%08x\n", (unsigned)offset, (unsigned)value); DB_PRINT(" offset:%x data:%08x\n", (unsigned)offset, (unsigned)value);
offset >>= 2; offset >>= 2;
if (offset >= CADENCE_UART_R_MAX) { if (offset >= CADENCE_UART_R_MAX) {
return; return MEMTX_DECODE_ERROR;
} }
switch (offset) { switch (offset) {
case R_IER: /* ier (wts imr) */ case R_IER: /* ier (wts imr) */
@ -466,30 +466,34 @@ static void uart_write(void *opaque, hwaddr offset,
break; break;
} }
uart_update_status(s); uart_update_status(s);
return MEMTX_OK;
} }
static uint64_t uart_read(void *opaque, hwaddr offset, static MemTxResult uart_read(void *opaque, hwaddr offset,
unsigned size) uint64_t *value, unsigned size, MemTxAttrs attrs)
{ {
CadenceUARTState *s = opaque; CadenceUARTState *s = opaque;
uint32_t c = 0; uint32_t c = 0;
offset >>= 2; offset >>= 2;
if (offset >= CADENCE_UART_R_MAX) { if (offset >= CADENCE_UART_R_MAX) {
c = 0; return MEMTX_DECODE_ERROR;
} else if (offset == R_TX_RX) { }
if (offset == R_TX_RX) {
uart_read_rx_fifo(s, &c); uart_read_rx_fifo(s, &c);
} else { } else {
c = s->r[offset]; c = s->r[offset];
} }
DB_PRINT(" offset:%x data:%08x\n", (unsigned)(offset << 2), (unsigned)c); DB_PRINT(" offset:%x data:%08x\n", (unsigned)(offset << 2), (unsigned)c);
return c; *value = c;
return MEMTX_OK;
} }
static const MemoryRegionOps uart_ops = { static const MemoryRegionOps uart_ops = {
.read = uart_read, .read_with_attrs = uart_read,
.write = uart_write, .write_with_attrs = uart_write,
.endianness = DEVICE_NATIVE_ENDIAN, .endianness = DEVICE_NATIVE_ENDIAN,
}; };