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xbox: mcpx -> mcpx-apu (to differentiate it from the 'aci')

This commit is contained in:
espes 2012-11-20 16:25:24 +11:00
parent 17d4dd207a
commit 78264809cb
5 changed files with 46 additions and 46 deletions
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2
hw/i386/Makefile.objs
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@ -12,6 +12,6 @@ obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_msi.o
obj-y += kvm/ obj-y += kvm/
obj-$(CONFIG_SPICE) += qxl.o qxl-logger.o qxl-render.o obj-$(CONFIG_SPICE) += qxl.o qxl-logger.o qxl-render.o
obj-$(CONFIG_XBOX) += xbox.o xbox_pci.o acpi_xbox.o amd_smbus.o nv2a.o nv2a_vsh.o mcpx.o smbus_xbox_smc.o smbus_cx25871.o smbus_adm1032.o obj-$(CONFIG_XBOX) += xbox.o xbox_pci.o acpi_xbox.o amd_smbus.o nv2a.o nv2a_vsh.o mcpx_apu.o smbus_xbox_smc.o smbus_cx25871.o smbus_adm1032.o
obj-y := $(addprefix ../,$(obj-y)) obj-y := $(addprefix ../,$(obj-y))

78
hw/mcpx.c → hw/mcpx_apu.c
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@ -20,7 +20,7 @@
#include "pc.h" #include "pc.h"
#include "pci.h" #include "pci.h"
#include "mcpx.h" #include "mcpx_apu.h"
//#define DEBUG //#define DEBUG
@ -31,38 +31,38 @@
#endif #endif
typedef struct MCPXState { typedef struct MCPXAPUState {
PCIDevice dev; PCIDevice dev;
qemu_irq irq; qemu_irq irq;
MemoryRegion mmio; MemoryRegion mmio;
MemoryRegion vp; MemoryRegion vp;
} MCPXState; } MCPXAPUState;
#define MCPX_DEVICE(obj) \ #define MCPX_APU_DEVICE(obj) \
OBJECT_CHECK(MCPXState, (obj), "mcpx") OBJECT_CHECK(MCPXAPUState, (obj), "mcpx-apu")
static uint64_t mcpx_read(void *opaque, static uint64_t mcpx_apu_read(void *opaque,
hwaddr addr, unsigned int size) hwaddr addr, unsigned int size)
{ {
MCPX_DPRINTF("mcpx: read [0x%llx]\n", addr); MCPX_DPRINTF("mcpx apu: read [0x%llx]\n", addr);
return 0; return 0;
} }
static void mcpx_write(void *opaque, hwaddr addr, static void mcpx_apu_write(void *opaque, hwaddr addr,
uint64_t val, unsigned int size) uint64_t val, unsigned int size)
{ {
MCPX_DPRINTF("mcpx: [0x%llx] = 0x%llx\n", addr, val); MCPX_DPRINTF("mcpx apu: [0x%llx] = 0x%llx\n", addr, val);
} }
/* Voice Processor */ /* Voice Processor */
static uint64_t mcpx_vp_read(void *opaque, static uint64_t mcpx_apu_vp_read(void *opaque,
hwaddr addr, unsigned int size) hwaddr addr, unsigned int size)
{ {
MCPX_DPRINTF("mcpx VP: read [0x%llx]\n", addr); MCPX_DPRINTF("mcpx apu VP: read [0x%llx]\n", addr);
switch (addr) { switch (addr) {
case 0x10: /* instruction queue free space */ case 0x10: /* instruction queue free space */
return 0x20; return 0x20;
@ -71,32 +71,32 @@ static uint64_t mcpx_vp_read(void *opaque,
} }
return 0; return 0;
} }
static void mcpx_vp_write(void *opaque, hwaddr addr, static void mcpx_apu_vp_write(void *opaque, hwaddr addr,
uint64_t val, unsigned int size) uint64_t val, unsigned int size)
{ {
MCPX_DPRINTF("mcpx VP: [0x%llx] = 0x%llx\n", addr, val); MCPX_DPRINTF("mcpx apu VP: [0x%llx] = 0x%llx\n", addr, val);
} }
static const MemoryRegionOps mcpx_mmio_ops = { static const MemoryRegionOps mcpx_apu_mmio_ops = {
.read = mcpx_read, .read = mcpx_apu_read,
.write = mcpx_write, .write = mcpx_apu_write,
}; };
static const MemoryRegionOps mcpx_vp_ops = { static const MemoryRegionOps mcpx_apu_vp_ops = {
.read = mcpx_vp_read, .read = mcpx_apu_vp_read,
.write = mcpx_vp_write, .write = mcpx_apu_vp_write,
}; };
static int mcpx_initfn(PCIDevice *dev) static int mcpx_apu_initfn(PCIDevice *dev)
{ {
MCPXState *d = MCPX_DEVICE(dev); MCPXAPUState *d = MCPX_APU_DEVICE(dev);
memory_region_init_io(&d->mmio, &mcpx_mmio_ops, d, memory_region_init_io(&d->mmio, &mcpx_apu_mmio_ops, d,
"mcpx-mmio", 0x80000); "mcpx-apu-mmio", 0x80000);
memory_region_init_io(&d->vp, &mcpx_vp_ops, d, memory_region_init_io(&d->vp, &mcpx_apu_vp_ops, d,
"mcpx-vp", 0x10000); "mcpx-apu-vp", 0x10000);
memory_region_add_subregion(&d->mmio, 0x20000, &d->vp); memory_region_add_subregion(&d->mmio, 0x20000, &d->vp);
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
@ -104,40 +104,40 @@ static int mcpx_initfn(PCIDevice *dev)
return 0; return 0;
} }
static void mcpx_class_init(ObjectClass *klass, void *data) static void mcpx_apu_class_init(ObjectClass *klass, void *data)
{ {
DeviceClass *dc = DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->vendor_id = PCI_VENDOR_ID_NVIDIA; k->vendor_id = PCI_VENDOR_ID_NVIDIA;
k->device_id = PCI_DEVICE_ID_NVIDIA_MCPX; k->device_id = PCI_DEVICE_ID_NVIDIA_MCPX_APU;
k->revision = 210; k->revision = 210;
k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO; k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
k->init = mcpx_initfn; k->init = mcpx_apu_initfn;
dc->desc = "MCPX Audio Processing Unit"; dc->desc = "MCPX Audio Processing Unit";
} }
static const TypeInfo mcpx_info = { static const TypeInfo mcpx_apu_info = {
.name = "mcpx", .name = "mcpx-apu",
.parent = TYPE_PCI_DEVICE, .parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(MCPXState), .instance_size = sizeof(MCPXAPUState),
.class_init = mcpx_class_init, .class_init = mcpx_apu_class_init,
}; };
static void mcpx_register(void) static void mcpx_apu_register(void)
{ {
type_register_static(&mcpx_info); type_register_static(&mcpx_apu_info);
} }
type_init(mcpx_register); type_init(mcpx_apu_register);
void mcpx_init(PCIBus *bus, int devfn, qemu_irq irq) void mcpx_apu_init(PCIBus *bus, int devfn, qemu_irq irq)
{ {
PCIDevice *dev; PCIDevice *dev;
MCPXState *d; MCPXAPUState *d;
dev = pci_create_simple(bus, devfn, "mcpx"); dev = pci_create_simple(bus, devfn, "mcpx-apu");
d = MCPX_DEVICE(dev); d = MCPX_APU_DEVICE(dev);
d->irq = irq; d->irq = irq;
} }

6
hw/mcpx.h → hw/mcpx_apu.h
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@ -17,9 +17,9 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>. * along with this program; if not, see <http://www.gnu.org/licenses/>.
*/ */
#ifndef HW_MCPX_H #ifndef HW_MCPX_APU_H
#define HW_MCPX_H #define HW_MCPX_APU_H
void mcpx_init(PCIBus *bus, int devfn, qemu_irq irq); void mcpx_apu_init(PCIBus *bus, int devfn, qemu_irq irq);
#endif #endif

2
hw/pci_ids.h
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@ -134,7 +134,7 @@
#define PCI_DEVICE_ID_NEC_UPD720200 0x0194 #define PCI_DEVICE_ID_NEC_UPD720200 0x0194
#define PCI_VENDOR_ID_NVIDIA 0x10de #define PCI_VENDOR_ID_NVIDIA 0x10de
#define PCI_DEVICE_ID_NVIDIA_MCPX 0x01b0 #define PCI_DEVICE_ID_NVIDIA_MCPX_APU 0x01b0
#define PCI_DEVICE_ID_NVIDIA_NFORCE_LPC 0x01b2 #define PCI_DEVICE_ID_NVIDIA_NFORCE_LPC 0x01b2
#define PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS 0x01b4 #define PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS 0x01b4
#define PCI_DEVICE_ID_NVIDIA_NFORCE_AGP 0x01b7 #define PCI_DEVICE_ID_NVIDIA_NFORCE_AGP 0x01b7

4
hw/xbox.c
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@ -40,7 +40,7 @@
#include "xbox_pci.h" #include "xbox_pci.h"
#include "nv2a.h" #include "nv2a.h"
#include "mcpx.h" #include "mcpx_apu.h"
/* mostly from pc_memory_init */ /* mostly from pc_memory_init */
static void xbox_memory_init(MemoryRegion *system_memory, static void xbox_memory_init(MemoryRegion *system_memory,
@ -307,7 +307,7 @@ static void xbox_init(QEMUMachineInitArgs *args)
smbus_adm1032_init(smbus, 0x4c); smbus_adm1032_init(smbus, 0x4c);
/* APU! */ /* APU! */
mcpx_init(host_bus, PCI_DEVFN(5, 0), gsi[5]); mcpx_apu_init(host_bus, PCI_DEVFN(5, 0), gsi[5]);
/* GPU! */ /* GPU! */
nv2a_init(agp_bus, PCI_DEVFN(0, 0), gsi[3]); nv2a_init(agp_bus, PCI_DEVFN(0, 0), gsi[3]);