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target-arm: Use target_phys_addr_t in get_phys_addr() 

In the implementation of get_phys_addr(), consistently use
target_phys_addr_t to hold the physical address rather than
uint32_t.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2012-07-12 10:59:09 +00:00
parent 891a2fe720
commit 77a71dd1cb
1 changed files with 15 additions and 14 deletions
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29
target-arm/helper.c
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@ -7,7 +7,7 @@
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
static inline int get_phys_addr(CPUARMState *env, uint32_t address, static inline int get_phys_addr(CPUARMState *env, uint32_t address,
int access_type, int is_user, int access_type, int is_user,
uint32_t *phys_ptr, int *prot, target_phys_addr_t *phys_ptr, int *prot,
target_ulong *page_size); target_ulong *page_size);
#endif #endif
@ -505,7 +505,7 @@ static int par_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
/* get_phys_addr() isn't present for user-mode-only targets */ /* get_phys_addr() isn't present for user-mode-only targets */
static int ats_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) static int ats_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
{ {
uint32_t phys_addr; target_phys_addr_t phys_addr;
target_ulong page_size; target_ulong page_size;
int prot; int prot;
int ret, is_user = ri->opc2 & 2; int ret, is_user = ri->opc2 & 2;
@ -1929,8 +1929,8 @@ static uint32_t get_level1_table_address(CPUARMState *env, uint32_t address)
} }
static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type, static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type,
int is_user, uint32_t *phys_ptr, int *prot, int is_user, target_phys_addr_t *phys_ptr,
target_ulong *page_size) int *prot, target_ulong *page_size)
{ {
int code; int code;
uint32_t table; uint32_t table;
@ -1939,7 +1939,7 @@ static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type,
int ap; int ap;
int domain; int domain;
int domain_prot; int domain_prot;
uint32_t phys_addr; target_phys_addr_t phys_addr;
/* Pagetable walk. */ /* Pagetable walk. */
/* Lookup l1 descriptor. */ /* Lookup l1 descriptor. */
@ -2024,8 +2024,8 @@ do_fault:
} }
static int get_phys_addr_v6(CPUARMState *env, uint32_t address, int access_type, static int get_phys_addr_v6(CPUARMState *env, uint32_t address, int access_type,
int is_user, uint32_t *phys_ptr, int *prot, int is_user, target_phys_addr_t *phys_ptr,
target_ulong *page_size) int *prot, target_ulong *page_size)
{ {
int code; int code;
uint32_t table; uint32_t table;
@ -2036,7 +2036,7 @@ static int get_phys_addr_v6(CPUARMState *env, uint32_t address, int access_type,
int ap; int ap;
int domain = 0; int domain = 0;
int domain_prot; int domain_prot;
uint32_t phys_addr; target_phys_addr_t phys_addr;
/* Pagetable walk. */ /* Pagetable walk. */
/* Lookup l1 descriptor. */ /* Lookup l1 descriptor. */
@ -2135,8 +2135,9 @@ do_fault:
return code | (domain << 4); return code | (domain << 4);
} }
static int get_phys_addr_mpu(CPUARMState *env, uint32_t address, int access_type, static int get_phys_addr_mpu(CPUARMState *env, uint32_t address,
int is_user, uint32_t *phys_ptr, int *prot) int access_type, int is_user,
target_phys_addr_t *phys_ptr, int *prot)
{ {
int n; int n;
uint32_t mask; uint32_t mask;
@ -2197,7 +2198,7 @@ static int get_phys_addr_mpu(CPUARMState *env, uint32_t address, int access_type
static inline int get_phys_addr(CPUARMState *env, uint32_t address, static inline int get_phys_addr(CPUARMState *env, uint32_t address,
int access_type, int is_user, int access_type, int is_user,
uint32_t *phys_ptr, int *prot, target_phys_addr_t *phys_ptr, int *prot,
target_ulong *page_size) target_ulong *page_size)
{ {
/* Fast Context Switch Extension. */ /* Fast Context Switch Extension. */
@ -2226,7 +2227,7 @@ static inline int get_phys_addr(CPUARMState *env, uint32_t address,
int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address, int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address,
int access_type, int mmu_idx) int access_type, int mmu_idx)
{ {
uint32_t phys_addr; target_phys_addr_t phys_addr;
target_ulong page_size; target_ulong page_size;
int prot; int prot;
int ret, is_user; int ret, is_user;
@ -2236,7 +2237,7 @@ int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address,
&page_size); &page_size);
if (ret == 0) { if (ret == 0) {
/* Map a single [sub]page. */ /* Map a single [sub]page. */
phys_addr &= ~(uint32_t)0x3ff; phys_addr &= ~(target_phys_addr_t)0x3ff;
address &= ~(uint32_t)0x3ff; address &= ~(uint32_t)0x3ff;
tlb_set_page (env, address, phys_addr, prot, mmu_idx, page_size); tlb_set_page (env, address, phys_addr, prot, mmu_idx, page_size);
return 0; return 0;
@ -2258,7 +2259,7 @@ int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address,
target_phys_addr_t cpu_get_phys_page_debug(CPUARMState *env, target_ulong addr) target_phys_addr_t cpu_get_phys_page_debug(CPUARMState *env, target_ulong addr)
{ {
uint32_t phys_addr; target_phys_addr_t phys_addr;
target_ulong page_size; target_ulong page_size;
int prot; int prot;
int ret; int ret;