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target/mips: msa: Split helpers for AVE_<S|U>.<B|H|W|D> 

Achieves clearer code and slightly better performance.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1569415572-19635-13-git-send-email-aleksandar.markovic@rt-rk.com>
This commit is contained in:
Aleksandar Markovic 2019-09-25 14:46:04 +02:00
parent a44d6d14a1
commit 7672edc4c6
3 changed files with 187 additions and 25 deletions
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12
target/mips/helper.h
View File

@ -822,6 +822,16 @@ DEF_HELPER_4(msa_bset_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_bset_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_bset_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_s_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_s_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_s_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_s_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_u_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_u_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_u_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ave_u_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
@ -880,8 +890,6 @@ DEF_HELPER_5(msa_add_a_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_adds_a_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_adds_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_adds_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_ave_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_ave_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_aver_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_aver_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subs_s_df, void, env, i32, i32, i32, i32)

162
target/mips/msa_helper.c
View File

@ -832,7 +832,151 @@ void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Average group helpers here */
static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
/* signed shift */
return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
}
void helper_msa_ave_s_b(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->b[0] = msa_ave_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
pwd->b[1] = msa_ave_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
pwd->b[2] = msa_ave_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
pwd->b[3] = msa_ave_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
pwd->b[4] = msa_ave_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
pwd->b[5] = msa_ave_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
pwd->b[6] = msa_ave_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
pwd->b[7] = msa_ave_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
pwd->b[8] = msa_ave_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
pwd->b[9] = msa_ave_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
pwd->b[10] = msa_ave_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
pwd->b[11] = msa_ave_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
pwd->b[12] = msa_ave_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
pwd->b[13] = msa_ave_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
pwd->b[14] = msa_ave_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
pwd->b[15] = msa_ave_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
}
void helper_msa_ave_s_h(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->h[0] = msa_ave_s_df(DF_HALF, pws->h[0], pwt->h[0]);
pwd->h[1] = msa_ave_s_df(DF_HALF, pws->h[1], pwt->h[1]);
pwd->h[2] = msa_ave_s_df(DF_HALF, pws->h[2], pwt->h[2]);
pwd->h[3] = msa_ave_s_df(DF_HALF, pws->h[3], pwt->h[3]);
pwd->h[4] = msa_ave_s_df(DF_HALF, pws->h[4], pwt->h[4]);
pwd->h[5] = msa_ave_s_df(DF_HALF, pws->h[5], pwt->h[5]);
pwd->h[6] = msa_ave_s_df(DF_HALF, pws->h[6], pwt->h[6]);
pwd->h[7] = msa_ave_s_df(DF_HALF, pws->h[7], pwt->h[7]);
}
void helper_msa_ave_s_w(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->w[0] = msa_ave_s_df(DF_WORD, pws->w[0], pwt->w[0]);
pwd->w[1] = msa_ave_s_df(DF_WORD, pws->w[1], pwt->w[1]);
pwd->w[2] = msa_ave_s_df(DF_WORD, pws->w[2], pwt->w[2]);
pwd->w[3] = msa_ave_s_df(DF_WORD, pws->w[3], pwt->w[3]);
}
void helper_msa_ave_s_d(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = msa_ave_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
pwd->d[1] = msa_ave_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
}
static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
{
uint64_t u_arg1 = UNSIGNED(arg1, df);
uint64_t u_arg2 = UNSIGNED(arg2, df);
/* unsigned shift */
return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
}
void helper_msa_ave_u_b(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->b[0] = msa_ave_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
pwd->b[1] = msa_ave_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
pwd->b[2] = msa_ave_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
pwd->b[3] = msa_ave_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
pwd->b[4] = msa_ave_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
pwd->b[5] = msa_ave_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
pwd->b[6] = msa_ave_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
pwd->b[7] = msa_ave_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
pwd->b[8] = msa_ave_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
pwd->b[9] = msa_ave_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
pwd->b[10] = msa_ave_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
pwd->b[11] = msa_ave_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
pwd->b[12] = msa_ave_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
pwd->b[13] = msa_ave_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
pwd->b[14] = msa_ave_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
pwd->b[15] = msa_ave_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
}
void helper_msa_ave_u_h(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->h[0] = msa_ave_u_df(DF_HALF, pws->h[0], pwt->h[0]);
pwd->h[1] = msa_ave_u_df(DF_HALF, pws->h[1], pwt->h[1]);
pwd->h[2] = msa_ave_u_df(DF_HALF, pws->h[2], pwt->h[2]);
pwd->h[3] = msa_ave_u_df(DF_HALF, pws->h[3], pwt->h[3]);
pwd->h[4] = msa_ave_u_df(DF_HALF, pws->h[4], pwt->h[4]);
pwd->h[5] = msa_ave_u_df(DF_HALF, pws->h[5], pwt->h[5]);
pwd->h[6] = msa_ave_u_df(DF_HALF, pws->h[6], pwt->h[6]);
pwd->h[7] = msa_ave_u_df(DF_HALF, pws->h[7], pwt->h[7]);
}
void helper_msa_ave_u_w(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->w[0] = msa_ave_u_df(DF_WORD, pws->w[0], pwt->w[0]);
pwd->w[1] = msa_ave_u_df(DF_WORD, pws->w[1], pwt->w[1]);
pwd->w[2] = msa_ave_u_df(DF_WORD, pws->w[2], pwt->w[2]);
pwd->w[3] = msa_ave_u_df(DF_WORD, pws->w[3], pwt->w[3]);
}
void helper_msa_ave_u_d(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = msa_ave_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
pwd->d[1] = msa_ave_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
}
/*
@ -1600,20 +1744,6 @@ static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
}
static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
/* signed shift */
return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
}
static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
{
uint64_t u_arg1 = UNSIGNED(arg1, df);
uint64_t u_arg2 = UNSIGNED(arg2, df);
/* unsigned shift */
return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
}
static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
/* signed shift */
@ -1935,8 +2065,6 @@ MSA_BINOP_DF(add_a)
MSA_BINOP_DF(adds_a)
MSA_BINOP_DF(adds_s)
MSA_BINOP_DF(adds_u)
MSA_BINOP_DF(ave_s)
MSA_BINOP_DF(ave_u)
MSA_BINOP_DF(aver_s)
MSA_BINOP_DF(aver_u)
MSA_BINOP_DF(subs_s)

38
target/mips/translate.c
View File

@ -28466,6 +28466,38 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
break;
}
break;
case OPC_AVE_S_df:
switch (df) {
case DF_BYTE:
gen_helper_msa_ave_s_b(cpu_env, twd, tws, twt);
break;
case DF_HALF:
gen_helper_msa_ave_s_h(cpu_env, twd, tws, twt);
break;
case DF_WORD:
gen_helper_msa_ave_s_w(cpu_env, twd, tws, twt);
break;
case DF_DOUBLE:
gen_helper_msa_ave_s_d(cpu_env, twd, tws, twt);
break;
}
break;
case OPC_AVE_U_df:
switch (df) {
case DF_BYTE:
gen_helper_msa_ave_u_b(cpu_env, twd, tws, twt);
break;
case DF_HALF:
gen_helper_msa_ave_u_h(cpu_env, twd, tws, twt);
break;
case DF_WORD:
gen_helper_msa_ave_u_w(cpu_env, twd, tws, twt);
break;
case DF_DOUBLE:
gen_helper_msa_ave_u_d(cpu_env, twd, tws, twt);
break;
}
break;
case OPC_SLL_df:
gen_helper_msa_sll_df(cpu_env, tdf, twd, tws, twt);
break;
@ -28556,9 +28588,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_CLE_S_df:
gen_helper_msa_cle_s_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_AVE_S_df:
gen_helper_msa_ave_s_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_ASUB_S_df:
gen_helper_msa_asub_s_df(cpu_env, tdf, twd, tws, twt);
break;
@ -28574,9 +28603,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_CLE_U_df:
gen_helper_msa_cle_u_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_AVE_U_df:
gen_helper_msa_ave_u_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_ASUB_U_df:
gen_helper_msa_asub_u_df(cpu_env, tdf, twd, tws, twt);
break;