mirror of https://github.com/xemu-project/xemu.git
hw/char: riscv_htif: Avoid using magic numbers
The Spike HTIF is poorly documented. The only relevant info we can get from the internet is from Andrew Waterman at [1]. Add a comment block before htif_handle_tohost_write() to explain the tohost register format, and use meaningful macros instead of magic numbers in the codes. While we are here, correct 2 multi-line comment blocks that have wrong format. Link: https://github.com/riscv-software-src/riscv-isa-sim/issues/364#issuecomment-607657754 [1] Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221229091828.1945072-2-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -38,6 +38,16 @@
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} \
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} \
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} while (0)
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} while (0)
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#define HTIF_DEV_SHIFT 56
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#define HTIF_CMD_SHIFT 48
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#define HTIF_DEV_SYSTEM 0
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#define HTIF_DEV_CONSOLE 1
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#define HTIF_SYSTEM_CMD_SYSCALL 0
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#define HTIF_CONSOLE_CMD_GETC 0
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#define HTIF_CONSOLE_CMD_PUTC 1
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static uint64_t fromhost_addr, tohost_addr;
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static uint64_t fromhost_addr, tohost_addr;
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static int address_symbol_set;
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static int address_symbol_set;
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@ -81,9 +91,11 @@ static void htif_recv(void *opaque, const uint8_t *buf, int size)
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return;
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return;
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}
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}
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/* TODO - we need to check whether mfromhost is zero which indicates
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/*
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the device is ready to receive. The current implementation
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* TODO - we need to check whether mfromhost is zero which indicates
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will drop characters */
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* the device is ready to receive. The current implementation
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* will drop characters
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*/
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uint64_t val_written = htifstate->pending_read;
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uint64_t val_written = htifstate->pending_read;
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uint64_t resp = 0x100 | *buf;
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uint64_t resp = 0x100 | *buf;
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@ -110,10 +122,30 @@ static int htif_be_change(void *opaque)
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return 0;
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return 0;
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}
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}
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/*
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* See below the tohost register format.
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*
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* Bits 63:56 indicate the "device".
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* Bits 55:48 indicate the "command".
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*
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* Device 0 is the syscall device, which is used to emulate Unixy syscalls.
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* It only implements command 0, which has two subfunctions:
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* - If bit 0 is clear, then bits 47:0 represent a pointer to a struct
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* describing the syscall.
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* - If bit 1 is set, then bits 47:1 represent an exit code, with a zero
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* value indicating success and other values indicating failure.
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*
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* Device 1 is the blocking character device.
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* - Command 0 reads a character
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* - Command 1 writes a character from the 8 LSBs of tohost
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*
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* For RV32, the tohost register is zero-extended, so only device=0 and
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* command=0 (i.e. HTIF syscalls/exit codes) are supported.
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*/
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static void htif_handle_tohost_write(HTIFState *htifstate, uint64_t val_written)
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static void htif_handle_tohost_write(HTIFState *htifstate, uint64_t val_written)
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{
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{
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uint8_t device = val_written >> 56;
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uint8_t device = val_written >> HTIF_DEV_SHIFT;
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uint8_t cmd = val_written >> 48;
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uint8_t cmd = val_written >> HTIF_CMD_SHIFT;
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uint64_t payload = val_written & 0xFFFFFFFFFFFFULL;
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uint64_t payload = val_written & 0xFFFFFFFFFFFFULL;
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int resp = 0;
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int resp = 0;
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@ -125,9 +157,9 @@ static void htif_handle_tohost_write(HTIFState *htifstate, uint64_t val_written)
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* 0: riscv-tests Pass/Fail Reporting Only (no syscall proxy)
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* 0: riscv-tests Pass/Fail Reporting Only (no syscall proxy)
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* 1: Console
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* 1: Console
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*/
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*/
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if (unlikely(device == 0x0)) {
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if (unlikely(device == HTIF_DEV_SYSTEM)) {
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/* frontend syscall handler, shutdown and exit code support */
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/* frontend syscall handler, shutdown and exit code support */
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if (cmd == 0x0) {
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if (cmd == HTIF_SYSTEM_CMD_SYSCALL) {
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if (payload & 0x1) {
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if (payload & 0x1) {
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/* exit code */
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/* exit code */
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int exit_code = payload >> 1;
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int exit_code = payload >> 1;
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@ -138,14 +170,14 @@ static void htif_handle_tohost_write(HTIFState *htifstate, uint64_t val_written)
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} else {
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} else {
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qemu_log("HTIF device %d: unknown command\n", device);
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qemu_log("HTIF device %d: unknown command\n", device);
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}
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}
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} else if (likely(device == 0x1)) {
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} else if (likely(device == HTIF_DEV_CONSOLE)) {
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/* HTIF Console */
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/* HTIF Console */
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if (cmd == 0x0) {
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if (cmd == HTIF_CONSOLE_CMD_GETC) {
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/* this should be a queue, but not yet implemented as such */
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/* this should be a queue, but not yet implemented as such */
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htifstate->pending_read = val_written;
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htifstate->pending_read = val_written;
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htifstate->env->mtohost = 0; /* clear to indicate we read */
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htifstate->env->mtohost = 0; /* clear to indicate we read */
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return;
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return;
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} else if (cmd == 0x1) {
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} else if (cmd == HTIF_CONSOLE_CMD_PUTC) {
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qemu_chr_fe_write(&htifstate->chr, (uint8_t *)&payload, 1);
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qemu_chr_fe_write(&htifstate->chr, (uint8_t *)&payload, 1);
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resp = 0x100 | (uint8_t)payload;
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resp = 0x100 | (uint8_t)payload;
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} else {
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} else {
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@ -157,15 +189,15 @@ static void htif_handle_tohost_write(HTIFState *htifstate, uint64_t val_written)
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" payload: %016" PRIx64, device, cmd, payload & 0xFF, payload);
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" payload: %016" PRIx64, device, cmd, payload & 0xFF, payload);
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}
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}
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/*
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/*
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* - latest bbl does not set fromhost to 0 if there is a value in tohost
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* Latest bbl does not set fromhost to 0 if there is a value in tohost.
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* - with this code enabled, qemu hangs waiting for fromhost to go to 0
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* With this code enabled, qemu hangs waiting for fromhost to go to 0.
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* - with this code disabled, qemu works with bbl priv v1.9.1 and v1.10
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* With this code disabled, qemu works with bbl priv v1.9.1 and v1.10.
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* - HTIF needs protocol documentation and a more complete state machine
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* HTIF needs protocol documentation and a more complete state machine.
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*
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while (!htifstate->fromhost_inprogress &&
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* while (!htifstate->fromhost_inprogress &&
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htifstate->env->mfromhost != 0x0) {
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* htifstate->env->mfromhost != 0x0) {
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}
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* }
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*/
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*/
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htifstate->env->mfromhost = (val_written >> 48 << 48) | (resp << 16 >> 16);
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htifstate->env->mfromhost = (val_written >> 48 << 48) | (resp << 16 >> 16);
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htifstate->env->mtohost = 0; /* clear to indicate we read */
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htifstate->env->mtohost = 0; /* clear to indicate we read */
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}
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}
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@ -196,7 +228,7 @@ static uint64_t htif_mm_read(void *opaque, hwaddr addr, unsigned size)
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/* CPU wrote to an HTIF register */
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/* CPU wrote to an HTIF register */
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static void htif_mm_write(void *opaque, hwaddr addr,
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static void htif_mm_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size)
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uint64_t value, unsigned size)
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{
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{
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HTIFState *htifstate = opaque;
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HTIFState *htifstate = opaque;
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if (addr == TOHOST_OFFSET1) {
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if (addr == TOHOST_OFFSET1) {
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