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hw/arm/armsse: Document SRAM_ADDR_WIDTH property in header comment
In commit4b635cf7a9
we added a QOM property to the ARMSSE object, but forgot to add it to the documentation comment in the header. Correct the omission. Fixes:4b635cf7a9
("hw/arm/armsse: Make SRAM bank size configurable") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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@ -46,6 +46,8 @@
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* being the same for both, to avoid having to have separate Property
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* lists for different variants. This restriction can be relaxed later
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* if necessary.)
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* + QOM property "SRAM_ADDR_WIDTH" sets the number of bits used for the
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* address of each SRAM bank (and thus the total amount of internal SRAM)
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* + Named GPIO inputs "EXP_IRQ" 0..n are the expansion interrupts for CPU 0,
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* which are wired to its NVIC lines 32 .. n+32
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* + Named GPIO inputs "EXP_CPU1_IRQ" 0..n are the expansion interrupts for
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