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mips: Decide to map PAGE_EXEC in map_address 

This commit addresses QEMU Bug #1825311:

  mips_cpu_handle_mmu_fault renders all accessed pages executable

It allows finer-grained control over whether the accessed page should
be executable by moving the decision to the underlying map_address
function, which has more information for this.

As a result, pages that have the XI bit set in the TLB and are accessed
for read/write, don't suddenly end up being executable.

Fixes: https://bugs.launchpad.net/qemu/+bug/1825311
Fixes: 2fb58b7374 ('target-mips: add RI and XI fields to TLB entry')

Signed-off-by: Jakub Jermář <jakub.jermar@kernkonzept.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190517123533.868479-1-jakub.jermar@kernkonzept.com>
This commit is contained in:
Jakub Jermář 2019-05-17 14:35:33 +02:00 committed by Aleksandar Markovic
parent c1c9a10fb1
commit 7353113fa4
1 changed files with 8 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
target/mips/helper.c
View File

@ -43,7 +43,7 @@ int no_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
target_ulong address, int rw, int access_type) target_ulong address, int rw, int access_type)
{ {
*physical = address; *physical = address;
*prot = PAGE_READ | PAGE_WRITE; *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
return TLBRET_MATCH; return TLBRET_MATCH;
} }
@ -61,7 +61,7 @@ int fixed_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
else else
*physical = address; *physical = address;
*prot = PAGE_READ | PAGE_WRITE; *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
return TLBRET_MATCH; return TLBRET_MATCH;
} }
@ -101,6 +101,9 @@ int r4k_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
*prot = PAGE_READ; *prot = PAGE_READ;
if (n ? tlb->D1 : tlb->D0) if (n ? tlb->D1 : tlb->D0)
*prot |= PAGE_WRITE; *prot |= PAGE_WRITE;
if (!(n ? tlb->XI1 : tlb->XI0)) {
*prot |= PAGE_EXEC;
}
return TLBRET_MATCH; return TLBRET_MATCH;
} }
return TLBRET_DIRTY; return TLBRET_DIRTY;
@ -182,7 +185,7 @@ static int get_seg_physical_address(CPUMIPSState *env, hwaddr *physical,
} else { } else {
/* The segment is unmapped */ /* The segment is unmapped */
*physical = physical_base | (real_address & segmask); *physical = physical_base | (real_address & segmask);
*prot = PAGE_READ | PAGE_WRITE; *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
return TLBRET_MATCH; return TLBRET_MATCH;
} }
} }
@ -907,7 +910,7 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
} }
if (ret == TLBRET_MATCH) { if (ret == TLBRET_MATCH) {
tlb_set_page(cs, address & TARGET_PAGE_MASK, tlb_set_page(cs, address & TARGET_PAGE_MASK,
physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, physical & TARGET_PAGE_MASK, prot,
mmu_idx, TARGET_PAGE_SIZE); mmu_idx, TARGET_PAGE_SIZE);
return true; return true;
} }
@ -927,7 +930,7 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
access_type, mips_access_type, mmu_idx); access_type, mips_access_type, mmu_idx);
if (ret == TLBRET_MATCH) { if (ret == TLBRET_MATCH) {
tlb_set_page(cs, address & TARGET_PAGE_MASK, tlb_set_page(cs, address & TARGET_PAGE_MASK,
physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, physical & TARGET_PAGE_MASK, prot,
mmu_idx, TARGET_PAGE_SIZE); mmu_idx, TARGET_PAGE_SIZE);
return true; return true;
} }