rejig dispatch, some new instructions

hw/xbox/dsp/dsp.c

@@ -113,6 +113,7 @@ uint32_t dsp_get_pc(void)
     return dsp_core.pc;
 }
 
+#if 0
 /**
  * Get next DSP PC without output (for debugging)
  */
@@ -137,6 +138,7 @@ uint32_t dsp_get_next_pc(uint32_t pc)
 
     return pc + instruction_length;
 }
+#endif
 
 /**
  * Get current DSP instruction cycles (for profiling)

hw/xbox/dsp/dsp_disasm.h

@@ -25,19 +25,121 @@
 #define DSP_DISASM_H
 
 #include <stdint.h>
+#include <stdbool.h>
+
+extern uint32_t prev_inst_pc;
+extern bool isLooping;
+
+/* Used to display dc instead of unknown instruction for illegal opcodes */
+extern bool isInDisasmMode;
+
+extern uint32_t disasm_cur_inst;
+extern uint16_t disasm_cur_inst_len;
+extern char str_instr[50];
+extern char parallelmove_name[64];
 
-typedef enum {
-    DSP_TRACE_MODE,
-    DSP_DISASM_MODE
-} dsp_trace_disasm_t;
 
 /* Functions */
-void dsp56k_disasm_init(void);
-uint16_t dsp56k_disasm(dsp_trace_disasm_t value);
 const char* dsp56k_get_instruction_text(void);
 
 /* Registers change */
 void dsp56k_disasm_reg_save(void);
 void dsp56k_disasm_reg_compare(void);
 
+
+typedef void (*dis_func_t)(void);
+
+void dis_undefined(void);
+
+/* Instructions without parallel moves */
+void dis_add_long(void);
+void dis_andi(void);
+void dis_bcc_long(void);
+void dis_bcc_imm(void);
+void dis_bchg_aa(void);
+void dis_bchg_ea(void);
+void dis_bchg_pp(void);
+void dis_bchg_reg(void);
+void dis_bclr_aa(void);
+void dis_bclr_ea(void);
+void dis_bclr_pp(void);
+void dis_bclr_reg(void);
+void dis_bra_imm(void);
+void dis_bset_aa(void);
+void dis_bset_ea(void);
+void dis_bset_pp(void);
+void dis_bset_reg(void);
+void dis_btst_aa(void);
+void dis_btst_ea(void);
+void dis_btst_pp(void);
+void dis_btst_reg(void);
+void dis_cmpu(void);
+void dis_div(void);
+void dis_enddo(void);
+void dis_illegal(void);
+void dis_jcc_imm(void);
+void dis_jcc_ea(void);
+void dis_jclr_aa(void);
+void dis_jclr_ea(void);
+void dis_jclr_pp(void);
+void dis_jclr_reg(void);
+void dis_jmp_ea(void);
+void dis_jmp_imm(void);
+void dis_jscc_ea(void);
+void dis_jscc_imm(void);
+void dis_jsclr_aa(void);
+void dis_jsclr_ea(void);
+void dis_jsclr_pp(void);
+void dis_jsclr_reg(void);
+void dis_jset_aa(void);
+void dis_jset_ea(void);
+void dis_jset_pp(void);
+void dis_jset_reg(void);
+void dis_jsr_ea(void);
+void dis_jsr_imm(void);
+void dis_jsset_aa(void);
+void dis_jsset_ea(void);
+void dis_jsset_pp(void);
+void dis_jsset_reg(void);
+void dis_lua(void);
+void dis_movem_ea(void);
+void dis_movem_aa(void);
+void dis_norm(void);
+void dis_ori(void);
+void dis_reset(void);
+void dis_rti(void);
+void dis_rts(void);
+void dis_stop(void);
+void dis_swi(void);
+void dis_tcc(void);
+void dis_wait(void);
+void dis_do_ea(void);
+void dis_do_aa(void);
+void dis_do_imm(void);
+void dis_do_reg(void);
+void dis_dor_imm(void);
+void dis_rep_aa(void);
+void dis_rep_ea(void);
+void dis_rep_imm(void);
+void dis_rep_reg(void);
+void dis_movec_aa(void);
+void dis_movec_ea(void);
+void dis_movec_imm(void);
+void dis_movec_reg(void);
+void dis_movep_0(void);
+void dis_movep_1(void);
+void dis_movep_23(void);
+
+void dis_movep_x_low(void);
+void dis_move_x_aa(void);
+
+/* Parallel moves */
+void dis_pm_class2(void);
+void dis_pm(void);
+void dis_pm_0(void);
+void dis_pm_1(void);
+void dis_pm_2(void);
+void dis_pm_4(void);
+void dis_pm_8(void);
+
 #endif /* DSP_DISASM_H */

hw/xbox/dsp/dsp_int.h

@@ -143,40 +143,39 @@ typedef struct dsp_interrupt_s {
 } dsp_interrupt_t;
 
 typedef struct dsp_core_s {
-
     /* DSP executing instructions ? */
     int running;
     
     /* DSP instruction Cycle counter */
-    uint16_t    instr_cycle;
+    uint16_t instr_cycle;
 
     /* Registers */
-    uint32_t    pc;
-    uint32_t    registers[DSP_REG_MAX];
+    uint32_t pc;
+    uint32_t registers[DSP_REG_MAX];
 
     /* stack[0=ssh], stack[1=ssl] */
-    uint32_t    stack[2][16];
+    uint32_t stack[2][16];
 
     uint32_t xram[DSP_XRAM_SIZE];
     uint32_t yram[DSP_YRAM_SIZE];
     uint32_t pram[DSP_PRAM_SIZE];
 
     /* peripheral space, x:0xffff80-0xffffff */
-    uint32_t    periph[DSP_PERIPH_SIZE];
+    uint32_t periph[DSP_PERIPH_SIZE];
 
     /* Misc */
     uint32_t loop_rep;      /* executing rep ? */
     uint32_t pc_on_rep;     /* True if PC is on REP instruction */
 
     /* Interruptions */
-    uint16_t    interrupt_state;        /* NONE, FAST or LONG interrupt */
-    uint16_t  interrupt_instr_fetch;        /* vector of the current interrupt */
-    uint16_t  interrupt_save_pc;        /* save next pc value before interrupt */
-    uint16_t  interrupt_counter;        /* count number of pending interrupts */
-    uint16_t  interrupt_IplToRaise;     /* save the IPL level to save in the SR register */
-    uint16_t  interrupt_pipeline_count; /* used to prefetch correctly the 2 inter instructions */
-    int16_t  interrupt_ipl[12];     /* store the current IPL for each interrupt */
-    uint16_t  interrupt_isPending[12];  /* store if interrupt is pending for each interrupt */
+    uint16_t interrupt_state;        /* NONE, FAST or LONG interrupt */
+    uint16_t interrupt_instr_fetch;        /* vector of the current interrupt */
+    uint16_t interrupt_save_pc;        /* save next pc value before interrupt */
+    uint16_t interrupt_counter;        /* count number of pending interrupts */
+    uint16_t interrupt_IplToRaise;     /* save the IPL level to save in the SR register */
+    uint16_t interrupt_pipeline_count; /* used to prefetch correctly the 2 inter instructions */
+    int16_t interrupt_ipl[12];     /* store the current IPL for each interrupt */
+    uint16_t interrupt_isPending[12];  /* store if interrupt is pending for each interrupt */
 } dsp_core_t;
 
 /* DSP */