mirror of https://github.com/xemu-project/xemu.git
Update PC BIOS to latest bits from Bochs
A number of patches were merged since we last pulled. Thanks to Marcelo Tosatti for rebasing the existing patches and testing. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6589 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
2edd089f8a
commit
7217e12403
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@ -6,19 +6,43 @@ Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Index: bochs/bios/rombios32.c
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Index: bochs/bios/rombios32.c
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===================================================================
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===================================================================
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--- bochs.orig/bios/rombios32.c
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diff --git a/bios/rombios32.c b/bios/rombios32.c
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+++ bochs/bios/rombios32.c
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index 3269be5..9587288 100644
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@@ -2081,7 +2081,8 @@ void smbios_init(void)
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--- a/bios/rombios32.c
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+++ b/bios/rombios32.c
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@@ -429,6 +429,7 @@ uint32_t cpuid_signature;
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uint32_t cpuid_features;
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uint32_t cpuid_ext_features;
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unsigned long ram_size;
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+uint64_t ram_end;
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uint8_t bios_uuid[16];
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#ifdef BX_USE_EBDA_TABLES
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unsigned long ebda_cur_addr;
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@@ -571,6 +572,13 @@ void ram_probe(void)
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ram_size = (cmos_readb(0x30) | (cmos_readb(0x31) << 8)) * 1024 +
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1 * 1024 * 1024;
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BX_INFO("ram_size=0x%08lx\n", ram_size);
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+ if (cmos_readb(0x5b) | cmos_readb(0x5c) | cmos_readb(0x5d))
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+ ram_end = (((uint64_t)cmos_readb(0x5b) << 16) |
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+ ((uint64_t)cmos_readb(0x5c) << 24) |
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+ ((uint64_t)cmos_readb(0x5d) << 32)) + (1ull << 32);
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+ else
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+ ram_end = ram_size;
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+ BX_INFO("end of ram=%ldMB\n", ram_end >> 20);
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#ifdef BX_USE_EBDA_TABLES
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ebda_cur_addr = ((*(uint16_t *)(0x40e)) << 4) + 0x380;
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BX_INFO("ebda_cur_addr: 0x%08lx\n", ebda_cur_addr);
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@@ -2174,7 +2182,8 @@ void smbios_init(void)
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{
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{
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unsigned cpu_num, nr_structs = 0, max_struct_size = 0;
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unsigned cpu_num, nr_structs = 0, max_struct_size = 0;
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char *start, *p, *q;
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char *start, *p, *q;
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- int memsize = ram_size / (1024 * 1024);
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- int memsize = ram_size / (1024 * 1024);
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+ int memsize = (ram_end == ram_size) ? ram_size / (1024 * 1024) :
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+ int memsize = (ram_end == ram_size) ? ram_size / (1024 * 1024) :
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+ (ram_end - (1ull << 32) + ram_size) / (1024 * 1024);
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+ (ram_end - (1ull << 32) + ram_size) / (1024 * 1024);
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#ifdef BX_USE_EBDA_TABLES
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#ifdef BX_USE_EBDA_TABLES
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ebda_cur_addr = align(ebda_cur_addr, 16);
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ebda_cur_addr = align(ebda_cur_addr, 16);
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@@ -2108,8 +2109,8 @@ void smbios_init(void)
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@@ -2201,8 +2210,8 @@ void smbios_init(void)
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add_struct(smbios_type_4_init(p, cpu_num));
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add_struct(smbios_type_4_init(p, cpu_num));
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add_struct(smbios_type_16_init(p, memsize));
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add_struct(smbios_type_16_init(p, memsize));
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add_struct(smbios_type_17_init(p, memsize));
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add_struct(smbios_type_17_init(p, memsize));
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@ -28,6 +52,4 @@ Index: bochs/bios/rombios32.c
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+ add_struct(smbios_type_20_init(p, ram_end / (1024 * 1024)));
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+ add_struct(smbios_type_20_init(p, ram_end / (1024 * 1024)));
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add_struct(smbios_type_32_init(p));
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add_struct(smbios_type_32_init(p));
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add_struct(smbios_type_127_init(p));
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add_struct(smbios_type_127_init(p));
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@ -1,120 +0,0 @@
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add mtrr support (Avi Kivity)
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program mtrrs for cpu 0. Doesn't support >=4G at the moment.
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Signed-off-by: Avi Kivity <avi@qumranet.com>
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Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Index: bochs/bios/rombios32.c
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===================================================================
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--- bochs.orig/bios/rombios32.c
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+++ bochs/bios/rombios32.c
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@@ -64,6 +64,23 @@ typedef unsigned long long uint64_t;
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#define BIOS_TMP_STORAGE 0x00030000 /* 64 KB used to copy the BIOS to shadow RAM */
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+#define MSR_MTRRcap 0x000000fe
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+#define MSR_MTRRfix64K_00000 0x00000250
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+#define MSR_MTRRfix16K_80000 0x00000258
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+#define MSR_MTRRfix16K_A0000 0x00000259
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+#define MSR_MTRRfix4K_C0000 0x00000268
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+#define MSR_MTRRfix4K_C8000 0x00000269
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+#define MSR_MTRRfix4K_D0000 0x0000026a
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+#define MSR_MTRRfix4K_D8000 0x0000026b
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+#define MSR_MTRRfix4K_E0000 0x0000026c
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+#define MSR_MTRRfix4K_E8000 0x0000026d
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+#define MSR_MTRRfix4K_F0000 0x0000026e
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+#define MSR_MTRRfix4K_F8000 0x0000026f
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+#define MSR_MTRRdefType 0x000002ff
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+
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+#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
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+#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
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+
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static inline void outl(int addr, int val)
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{
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asm volatile ("outl %1, %w0" : : "d" (addr), "a" (val));
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@@ -135,6 +152,19 @@ static inline void putc(int c)
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outb(INFO_PORT, c);
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}
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+static uint64_t rdmsr(unsigned index)
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+{
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+ unsigned long long ret;
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+
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+ asm ("rdmsr" : "=A"(ret) : "c"(index));
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+ return ret;
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+}
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+
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+static void wrmsr(unsigned index, uint64_t val)
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+{
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+ asm volatile ("wrmsr" : : "c"(index), "A"(val));
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+}
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+
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static inline int isdigit(int c)
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{
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return c >= '0' && c <= '9';
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@@ -469,6 +499,54 @@ static int cmos_readb(int addr)
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return inb(0x71);
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}
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+void setup_mtrr(void)
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+{
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+ int i, vcnt, fix, wc;
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+ uint32_t mtrr_cap;
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+ union {
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+ uint8_t valb[8];
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+ uint64_t val;
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+ } u;
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+ uint64_t vbase, vmask;
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+
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+ mtrr_cap = rdmsr(MSR_MTRRcap);
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+ vcnt = mtrr_cap & 0xff;
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+ fix = mtrr_cap & 0x100;
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+ wc = mtrr_cap & 0x400;
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+ if (!vcnt || !fix)
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+ return;
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+ u.val = 0;
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+ for (i = 0; i < 8; ++i)
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+ if (ram_size >= 65536 * (i + 1))
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+ u.valb[i] = 6;
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+ wrmsr(MSR_MTRRfix64K_00000, u.val);
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+ u.val = 0;
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+ for (i = 0; i < 8; ++i)
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+ if (ram_size >= 65536 * 8 + 16384 * (i + 1))
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+ u.valb[i] = 6;
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+ wrmsr(MSR_MTRRfix16K_80000, u.val);
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+ wrmsr(MSR_MTRRfix16K_A0000, 0);
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+ wrmsr(MSR_MTRRfix4K_C0000, 0);
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+ wrmsr(MSR_MTRRfix4K_C8000, 0);
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+ wrmsr(MSR_MTRRfix4K_D0000, 0);
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+ wrmsr(MSR_MTRRfix4K_D8000, 0);
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+ wrmsr(MSR_MTRRfix4K_E0000, 0);
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+ wrmsr(MSR_MTRRfix4K_E8000, 0);
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+ wrmsr(MSR_MTRRfix4K_F0000, 0);
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+ wrmsr(MSR_MTRRfix4K_F8000, 0);
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+ vbase = 0;
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+ --vcnt; /* leave one mtrr for VRAM */
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+ for (i = 0; i < vcnt && vbase < ram_size; ++i) {
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+ vmask = (1ull << 40) - 1;
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+ while (vbase + vmask + 1 > ram_size)
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+ vmask >>= 1;
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+ wrmsr(MTRRphysBase_MSR(i), vbase | 6);
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+ wrmsr(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
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+ vbase += vmask + 1;
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+ }
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+ wrmsr(MSR_MTRRdefType, 0xc00);
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+}
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+
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void ram_probe(void)
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{
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if (cmos_readb(0x34) | cmos_readb(0x35))
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@@ -482,6 +560,7 @@ void ram_probe(void)
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ebda_cur_addr = ((*(uint16_t *)(0x40e)) << 4) + 0x380;
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BX_INFO("ebda_cur_addr: 0x%08lx\n", ebda_cur_addr);
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#endif
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+ setup_mtrr();
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}
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/****************************************************/
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@ -1,126 +0,0 @@
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smp mtrr support (Avi Kivity)
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Signed-off-by: Avi Kivity <avi@qumranet.com>
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Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Index: bochs/bios/rombios.h
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===================================================================
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--- bochs.orig/bios/rombios.h
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+++ bochs/bios/rombios.h
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@@ -56,6 +56,7 @@
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#define ACPI_DATA_SIZE 0x00010000L
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#define PM_IO_BASE 0xb000
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#define SMB_IO_BASE 0xb100
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+#define SMP_MSR_ADDR 0xf010
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// Define the application NAME
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#if defined(BX_QEMU)
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Index: bochs/bios/rombios32.c
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===================================================================
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--- bochs.orig/bios/rombios32.c
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+++ bochs/bios/rombios32.c
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@@ -472,6 +472,23 @@ void qemu_cfg_read(uint8_t *buf, int len
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}
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#endif
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+void init_smp_msrs(void)
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+{
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+ *(uint32_t *)SMP_MSR_ADDR = 0;
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+}
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+
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+void wrmsr_smp(uint32_t index, uint64_t val)
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+{
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+ static struct { uint32_t ecx, eax, edx; } *p = (void *)SMP_MSR_ADDR;
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+
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+ wrmsr(index, val);
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+ p->ecx = index;
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+ p->eax = val;
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+ p->edx = val >> 32;
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+ ++p;
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+ p->ecx = 0;
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+}
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+
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void uuid_probe(void)
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{
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#ifdef BX_QEMU
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@@ -519,32 +536,32 @@ void setup_mtrr(void)
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for (i = 0; i < 8; ++i)
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if (ram_size >= 65536 * (i + 1))
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u.valb[i] = 6;
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- wrmsr(MSR_MTRRfix64K_00000, u.val);
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+ wrmsr_smp(MSR_MTRRfix64K_00000, u.val);
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u.val = 0;
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for (i = 0; i < 8; ++i)
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if (ram_size >= 65536 * 8 + 16384 * (i + 1))
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u.valb[i] = 6;
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- wrmsr(MSR_MTRRfix16K_80000, u.val);
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- wrmsr(MSR_MTRRfix16K_A0000, 0);
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- wrmsr(MSR_MTRRfix4K_C0000, 0);
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- wrmsr(MSR_MTRRfix4K_C8000, 0);
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- wrmsr(MSR_MTRRfix4K_D0000, 0);
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- wrmsr(MSR_MTRRfix4K_D8000, 0);
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- wrmsr(MSR_MTRRfix4K_E0000, 0);
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- wrmsr(MSR_MTRRfix4K_E8000, 0);
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- wrmsr(MSR_MTRRfix4K_F0000, 0);
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- wrmsr(MSR_MTRRfix4K_F8000, 0);
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+ wrmsr_smp(MSR_MTRRfix16K_80000, u.val);
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+ wrmsr_smp(MSR_MTRRfix16K_A0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_C0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_C8000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_D0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_D8000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_E0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_E8000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_F0000, 0);
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+ wrmsr_smp(MSR_MTRRfix4K_F8000, 0);
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vbase = 0;
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--vcnt; /* leave one mtrr for VRAM */
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for (i = 0; i < vcnt && vbase < ram_size; ++i) {
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vmask = (1ull << 40) - 1;
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while (vbase + vmask + 1 > ram_size)
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vmask >>= 1;
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- wrmsr(MTRRphysBase_MSR(i), vbase | 6);
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- wrmsr(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
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+ wrmsr_smp(MTRRphysBase_MSR(i), vbase | 6);
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+ wrmsr_smp(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
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vbase += vmask + 1;
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}
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- wrmsr(MSR_MTRRdefType, 0xc00);
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+ wrmsr_smp(MSR_MTRRdefType, 0xc00);
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}
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void ram_probe(void)
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@@ -2263,6 +2280,8 @@ void rombios32_init(uint32_t *s3_resume_
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qemu_cfg_port = qemu_cfg_port_probe();
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#endif
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+ init_smp_msrs();
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+
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ram_probe();
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cpu_probe();
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Index: bochs/bios/rombios32start.S
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===================================================================
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--- bochs.orig/bios/rombios32start.S
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+++ bochs/bios/rombios32start.S
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@@ -49,6 +49,18 @@ _start:
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smp_ap_boot_code_start:
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xor %ax, %ax
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mov %ax, %ds
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+
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+ mov $SMP_MSR_ADDR, %ebx
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+11:
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+ mov 0(%ebx), %ecx
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+ test %ecx, %ecx
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+ jz 12f
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+ mov 4(%ebx), %eax
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+ mov 8(%ebx), %edx
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+ wrmsr
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+ add $12, %ebx
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+ jmp 11b
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+12:
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lock incw smp_cpus
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1:
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hlt
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@ -1,62 +0,0 @@
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extend MTRRs to above 4G (Alex Williamson)
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When I try to boot guests using a recent Linux kernel (2.6.26+), memory
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above 3.5G gets thrown away with an error like this:
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||||||
WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 4608MB of RAM
|
|
||||||
|
|
||||||
This extends MTRRs to cover all of memory.
|
|
||||||
|
|
||||||
Signed-off-by: Alex Williamson <alex.williamson@hp.com>
|
|
||||||
Signed-off-by: Avi Kivity <avi@redhat.com>
|
|
||||||
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
|
|
||||||
|
|
||||||
Index: bochs/bios/rombios32.c
|
|
||||||
===================================================================
|
|
||||||
--- bochs.orig/bios/rombios32.c
|
|
||||||
+++ bochs/bios/rombios32.c
|
|
||||||
@@ -427,6 +427,7 @@ uint32_t cpuid_signature;
|
|
||||||
uint32_t cpuid_features;
|
|
||||||
uint32_t cpuid_ext_features;
|
|
||||||
unsigned long ram_size;
|
|
||||||
+uint64_t above4g_ram_size;
|
|
||||||
uint8_t bios_uuid[16];
|
|
||||||
#ifdef BX_USE_EBDA_TABLES
|
|
||||||
unsigned long ebda_cur_addr;
|
|
||||||
@@ -561,6 +562,14 @@ void setup_mtrr(void)
|
|
||||||
wrmsr_smp(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
|
|
||||||
vbase += vmask + 1;
|
|
||||||
}
|
|
||||||
+ for (vbase = 1ull << 32; i < vcnt && vbase < above4g_ram_size; ++i) {
|
|
||||||
+ vmask = (1ull << 40) - 1;
|
|
||||||
+ while (vbase + vmask + 1 > above4g_ram_size)
|
|
||||||
+ vmask >>= 1;
|
|
||||||
+ wrmsr_smp(MTRRphysBase_MSR(i), vbase | 6);
|
|
||||||
+ wrmsr_smp(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
|
|
||||||
+ vbase += vmask + 1;
|
|
||||||
+ }
|
|
||||||
wrmsr_smp(MSR_MTRRdefType, 0xc00);
|
|
||||||
}
|
|
||||||
|
|
||||||
@@ -572,11 +581,19 @@ void ram_probe(void)
|
|
||||||
else
|
|
||||||
ram_size = (cmos_readb(0x30) | (cmos_readb(0x31) << 8)) * 1024 +
|
|
||||||
1 * 1024 * 1024;
|
|
||||||
+ if (cmos_readb(0x5b) | cmos_readb(0x5c) | cmos_readb(0x5d))
|
|
||||||
+ above4g_ram_size = ((uint64_t)cmos_readb(0x5b) << 16) |
|
|
||||||
+ ((uint64_t)cmos_readb(0x5c) << 24) | ((uint64_t)cmos_readb(0x5d) << 32);
|
|
||||||
+
|
|
||||||
+ if (above4g_ram_size)
|
|
||||||
+ above4g_ram_size += 1ull << 32;
|
|
||||||
+
|
|
||||||
BX_INFO("ram_size=0x%08lx\n", ram_size);
|
|
||||||
#ifdef BX_USE_EBDA_TABLES
|
|
||||||
ebda_cur_addr = ((*(uint16_t *)(0x40e)) << 4) + 0x380;
|
|
||||||
BX_INFO("ebda_cur_addr: 0x%08lx\n", ebda_cur_addr);
|
|
||||||
#endif
|
|
||||||
+ BX_INFO("top of ram %ldMB\n", above4g_ram_size >> 20);
|
|
||||||
setup_mtrr();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1,58 +0,0 @@
|
||||||
cleanup/consolidate above 4G memory parsing (Alex Williamson)
|
|
||||||
|
|
||||||
Signed-off-by: Alex Williamson <alex.williamson@hp.com>
|
|
||||||
Signed-off-by: Avi Kivity <avi@redhat.com>
|
|
||||||
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
|
|
||||||
|
|
||||||
Index: bochs/bios/rombios32.c
|
|
||||||
===================================================================
|
|
||||||
--- bochs.orig/bios/rombios32.c
|
|
||||||
+++ bochs/bios/rombios32.c
|
|
||||||
@@ -427,7 +427,7 @@ uint32_t cpuid_signature;
|
|
||||||
uint32_t cpuid_features;
|
|
||||||
uint32_t cpuid_ext_features;
|
|
||||||
unsigned long ram_size;
|
|
||||||
-uint64_t above4g_ram_size;
|
|
||||||
+uint64_t ram_end;
|
|
||||||
uint8_t bios_uuid[16];
|
|
||||||
#ifdef BX_USE_EBDA_TABLES
|
|
||||||
unsigned long ebda_cur_addr;
|
|
||||||
@@ -562,9 +562,9 @@ void setup_mtrr(void)
|
|
||||||
wrmsr_smp(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
|
|
||||||
vbase += vmask + 1;
|
|
||||||
}
|
|
||||||
- for (vbase = 1ull << 32; i < vcnt && vbase < above4g_ram_size; ++i) {
|
|
||||||
+ for (vbase = 1ull << 32; i < vcnt && vbase < ram_end; ++i) {
|
|
||||||
vmask = (1ull << 40) - 1;
|
|
||||||
- while (vbase + vmask + 1 > above4g_ram_size)
|
|
||||||
+ while (vbase + vmask + 1 > ram_end)
|
|
||||||
vmask >>= 1;
|
|
||||||
wrmsr_smp(MTRRphysBase_MSR(i), vbase | 6);
|
|
||||||
wrmsr_smp(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
|
|
||||||
@@ -582,18 +582,19 @@ void ram_probe(void)
|
|
||||||
ram_size = (cmos_readb(0x30) | (cmos_readb(0x31) << 8)) * 1024 +
|
|
||||||
1 * 1024 * 1024;
|
|
||||||
if (cmos_readb(0x5b) | cmos_readb(0x5c) | cmos_readb(0x5d))
|
|
||||||
- above4g_ram_size = ((uint64_t)cmos_readb(0x5b) << 16) |
|
|
||||||
- ((uint64_t)cmos_readb(0x5c) << 24) | ((uint64_t)cmos_readb(0x5d) << 32);
|
|
||||||
+ ram_end = (((uint64_t)cmos_readb(0x5b) << 16) |
|
|
||||||
+ ((uint64_t)cmos_readb(0x5c) << 24) |
|
|
||||||
+ ((uint64_t)cmos_readb(0x5d) << 32)) + (1ull << 32);
|
|
||||||
+ else
|
|
||||||
+ ram_end = ram_size;
|
|
||||||
|
|
||||||
- if (above4g_ram_size)
|
|
||||||
- above4g_ram_size += 1ull << 32;
|
|
||||||
+ BX_INFO("end of ram=%ldMB\n", ram_end >> 20);
|
|
||||||
|
|
||||||
BX_INFO("ram_size=0x%08lx\n", ram_size);
|
|
||||||
#ifdef BX_USE_EBDA_TABLES
|
|
||||||
ebda_cur_addr = ((*(uint16_t *)(0x40e)) << 4) + 0x380;
|
|
||||||
BX_INFO("ebda_cur_addr: 0x%08lx\n", ebda_cur_addr);
|
|
||||||
#endif
|
|
||||||
- BX_INFO("top of ram %ldMB\n", above4g_ram_size >> 20);
|
|
||||||
setup_mtrr();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1,54 +0,0 @@
|
||||||
switch MTRRs to cover only the PCI range and default to WB (Alex Williamson)
|
|
||||||
|
|
||||||
This matches how some bare metal machines report MTRRs and avoids
|
|
||||||
the problem of running out of MTRRs to cover all of RAM.
|
|
||||||
|
|
||||||
Signed-off-by: Alex Williamson <alex.williamson@hp.com>
|
|
||||||
Signed-off-by: Avi Kivity <avi@redhat.com>
|
|
||||||
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
|
|
||||||
|
|
||||||
Index: bochs/bios/rombios32.c
|
|
||||||
===================================================================
|
|
||||||
--- bochs.orig/bios/rombios32.c
|
|
||||||
+++ bochs/bios/rombios32.c
|
|
||||||
@@ -525,7 +525,6 @@ void setup_mtrr(void)
|
|
||||||
uint8_t valb[8];
|
|
||||||
uint64_t val;
|
|
||||||
} u;
|
|
||||||
- uint64_t vbase, vmask;
|
|
||||||
|
|
||||||
mtrr_cap = rdmsr(MSR_MTRRcap);
|
|
||||||
vcnt = mtrr_cap & 0xff;
|
|
||||||
@@ -552,25 +551,10 @@ void setup_mtrr(void)
|
|
||||||
wrmsr_smp(MSR_MTRRfix4K_E8000, 0);
|
|
||||||
wrmsr_smp(MSR_MTRRfix4K_F0000, 0);
|
|
||||||
wrmsr_smp(MSR_MTRRfix4K_F8000, 0);
|
|
||||||
- vbase = 0;
|
|
||||||
- --vcnt; /* leave one mtrr for VRAM */
|
|
||||||
- for (i = 0; i < vcnt && vbase < ram_size; ++i) {
|
|
||||||
- vmask = (1ull << 40) - 1;
|
|
||||||
- while (vbase + vmask + 1 > ram_size)
|
|
||||||
- vmask >>= 1;
|
|
||||||
- wrmsr_smp(MTRRphysBase_MSR(i), vbase | 6);
|
|
||||||
- wrmsr_smp(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
|
|
||||||
- vbase += vmask + 1;
|
|
||||||
- }
|
|
||||||
- for (vbase = 1ull << 32; i < vcnt && vbase < ram_end; ++i) {
|
|
||||||
- vmask = (1ull << 40) - 1;
|
|
||||||
- while (vbase + vmask + 1 > ram_end)
|
|
||||||
- vmask >>= 1;
|
|
||||||
- wrmsr_smp(MTRRphysBase_MSR(i), vbase | 6);
|
|
||||||
- wrmsr_smp(MTRRphysMask_MSR(i), (~vmask & 0xfffffff000ull) | 0x800);
|
|
||||||
- vbase += vmask + 1;
|
|
||||||
- }
|
|
||||||
- wrmsr_smp(MSR_MTRRdefType, 0xc00);
|
|
||||||
+ /* Mark 3.5-4GB as UC, anything not specified defaults to WB */
|
|
||||||
+ wrmsr_smp(MTRRphysBase_MSR(0), 0xe0000000ull | 0);
|
|
||||||
+ wrmsr_smp(MTRRphysMask_MSR(0), ~(0x20000000ull - 1) | 0x800);
|
|
||||||
+ wrmsr_smp(MSR_MTRRdefType, 0xc06);
|
|
||||||
}
|
|
||||||
|
|
||||||
void ram_probe(void)
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1 +1 @@
|
||||||
36989b0d2e785ac9e5d6e8a226dbdeb82e876bfd
|
04387139e3b5ac97b5633cd40b3d87cdf45efd6c
|
||||||
|
|
|
@ -1,10 +1,5 @@
|
||||||
0001_bx-qemu.patch
|
0001_bx-qemu.patch
|
||||||
0002_kvm-bios-update-smbios-table-to-report-memory-above-4g.patch
|
0002_kvm-bios-update-smbios-table-to-report-memory-above-4g.patch
|
||||||
0003_kvm-bios-generate-mptable-unconditionally.patch
|
0003_kvm-bios-generate-mptable-unconditionally.patch
|
||||||
0004_kvm-bios-add-mtrr-support.patch
|
0004_kvm-bios-resolve-memory-device-roll-over-reporting--issues-with-32g-guests.patch
|
||||||
0005_kvm-bios-smp-mtrr-support.patch
|
0005_kvm-bios-fix-smbios-memory-device-length-boundary--condition.patch
|
||||||
0006_kvm-bios-extend-mtrrs-to-above-4g.patch
|
|
||||||
0007_kvm-bios-cleanup-consolidate-above-4g-memory-parsing.patch
|
|
||||||
0008_kvm-bios-switch-mtrrs-to-cover-only-the-pci-range-and--default-to-wb.patch
|
|
||||||
0009_kvm-bios-resolve-memory-device-roll-over-reporting--issues-with-32g-guests.patch
|
|
||||||
0010_kvm-bios-fix-smbios-memory-device-length-boundary--condition.patch
|
|
||||||
|
|
BIN
pc-bios/bios.bin
BIN
pc-bios/bios.bin
Binary file not shown.
Loading…
Reference in New Issue