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qemu-log: use LOG_UNIMP for some target CPU cases 

Use LOG_UNIMP for some target CPU cases.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Acked-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Blue Swirl 2012-06-03 17:06:07 +00:00
parent dafdf1abfd
commit 71547a3bf3
5 changed files with 58 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target-i386/op_helper.c
View File

@ -3146,6 +3146,7 @@ void helper_rdpmc(void)
helper_svm_check_intercept_param(SVM_EXIT_RDPMC, 0);
/* currently unimplemented */
qemu_log_mask(LOG_UNIMP, "x86: unimplemented rdpmc\n");
raise_exception_err(EXCP06_ILLOP, 0);
}

11
target-microblaze/translate.c
View File

@ -1539,8 +1539,10 @@ static void dec_fpu(DisasContext *dc)
cpu_R[dc->ra], cpu_R[dc->rb]);
break;
default:
qemu_log ("unimplemented fcmp fpu_insn=%x pc=%x opc=%x\n",
fpu_insn, dc->pc, dc->opcode);
qemu_log_mask(LOG_UNIMP,
"unimplemented fcmp fpu_insn=%x pc=%x"
" opc=%x\n",
fpu_insn, dc->pc, dc->opcode);
dc->abort_at_next_insn = 1;
break;
}
@ -1568,8 +1570,9 @@ static void dec_fpu(DisasContext *dc)
break;
default:
qemu_log ("unimplemented FPU insn fpu_insn=%x pc=%x opc=%x\n",
fpu_insn, dc->pc, dc->opcode);
qemu_log_mask(LOG_UNIMP, "unimplemented FPU insn fpu_insn=%x pc=%x"
" opc=%x\n",
fpu_insn, dc->pc, dc->opcode);
dc->abort_at_next_insn = 1;
break;
}

2
target-ppc/helper.c
View File

@ -1621,7 +1621,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
break;
#endif
default:
cpu_fprintf(f, "%s: unimplemented\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: unimplemented\n", __func__);
}
}

2
target-s390x/translate.c
View File

@ -5098,7 +5098,7 @@ static void disas_s390_insn(DisasContext *s)
disas_ed(s, op, r1, x2, b2, d2, r1b);
break;
default:
LOG_DISAS("unimplemented opcode 0x%x\n", opc);
qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%x\n", opc);
gen_illegal_opcode(s, ilc);
break;
}

80
target-sparc/ldst_helper.c
View File

@ -464,16 +464,18 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
if (size == 8) {
ret = env->mxccregs[3];
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00a04: /* MXCC control register */
if (size == 4) {
ret = env->mxccregs[3];
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00c00: /* Module reset register */
@ -481,21 +483,24 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
ret = env->mxccregs[5];
/* should we do something here? */
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8) {
ret = env->mxccregs[7];
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
default:
DPRINTF_MXCC("%08x: unimplemented address, size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented address, size: %d\n", addr,
size);
break;
}
DPRINTF_MXCC("asi = %d, size = %d, sign = %d, "
@ -719,40 +724,45 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccdata[0] = val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00008: /* MXCC stream data register 1 */
if (size == 8) {
env->mxccdata[1] = val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00010: /* MXCC stream data register 2 */
if (size == 8) {
env->mxccdata[2] = val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00018: /* MXCC stream data register 3 */
if (size == 8) {
env->mxccdata[3] = val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00100: /* MXCC stream source */
if (size == 8) {
env->mxccregs[0] = val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
env->mxccdata[0] = ldq_phys((env->mxccregs[0] & 0xffffffffULL) +
0);
@ -767,8 +777,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[1] = val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
stq_phys((env->mxccregs[1] & 0xffffffffULL) + 0,
env->mxccdata[0]);
@ -783,8 +794,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[3] = val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00a04: /* MXCC control register */
@ -792,8 +804,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
env->mxccregs[3] = (env->mxccregs[3] & 0xffffffff00000000ULL)
| val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00e00: /* MXCC error register */
@ -801,21 +814,24 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[6] &= ~val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8) {
env->mxccregs[7] = val;
} else {
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented access size: %d\n", addr,
size);
}
break;
default:
DPRINTF_MXCC("%08x: unimplemented address, size: %d\n", addr,
size);
qemu_log_mask(LOG_UNIMP,
"%08x: unimplemented address, size: %d\n", addr,
size);
break;
}
DPRINTF_MXCC("asi = %d, size = %d, addr = %08x, val = %" PRIx64 "\n",