mirror of https://github.com/xemu-project/xemu.git
ppc/pnv: Introduce PnvChipClass::xscom_pcba() method
The XSCOM bus is implemented with a QOM interface, which is mostly generic from a CPU type standpoint, except for the computation of addresses on the Pervasive Connect Bus (PCB) network. This is handled by the pnv_xscom_pcba() function with a switch statement based on the chip_type class level attribute of the CPU chip. This can be achieved using QOM. Also the address argument is masked with PNV_XSCOM_SIZE - 1, which is for POWER8 only. Addresses may have different sizes with other CPU types. Have each CPU chip type handle the appropriate computation with a QOM xscom_pcba() method. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157623843543.360005.13996472463887521794.stgit@bahia.lan> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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3caf7bd0a2
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70c059e926
23
hw/ppc/pnv.c
23
hw/ppc/pnv.c
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@ -1120,6 +1120,12 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
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&chip8->homer.regs);
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}
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static uint32_t pnv_chip_power8_xscom_pcba(PnvChip *chip, uint64_t addr)
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{
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addr &= (PNV_XSCOM_SIZE - 1);
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return ((addr >> 4) & ~0xfull) | ((addr >> 3) & 0xf);
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}
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static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -1137,6 +1143,7 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
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k->dt_populate = pnv_chip_power8_dt_populate;
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k->pic_print_info = pnv_chip_power8_pic_print_info;
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k->xscom_core_base = pnv_chip_power8_xscom_core_base;
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k->xscom_pcba = pnv_chip_power8_xscom_pcba;
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dc->desc = "PowerNV Chip POWER8E";
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device_class_set_parent_realize(dc, pnv_chip_power8_realize,
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@ -1160,6 +1167,7 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data)
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k->dt_populate = pnv_chip_power8_dt_populate;
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k->pic_print_info = pnv_chip_power8_pic_print_info;
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k->xscom_core_base = pnv_chip_power8_xscom_core_base;
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k->xscom_pcba = pnv_chip_power8_xscom_pcba;
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dc->desc = "PowerNV Chip POWER8";
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device_class_set_parent_realize(dc, pnv_chip_power8_realize,
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@ -1183,6 +1191,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data)
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k->dt_populate = pnv_chip_power8_dt_populate;
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k->pic_print_info = pnv_chip_power8_pic_print_info;
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k->xscom_core_base = pnv_chip_power8_xscom_core_base;
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k->xscom_pcba = pnv_chip_power8_xscom_pcba;
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dc->desc = "PowerNV Chip POWER8NVL";
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device_class_set_parent_realize(dc, pnv_chip_power8_realize,
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@ -1339,6 +1348,12 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
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&chip9->homer.regs);
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}
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static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip, uint64_t addr)
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{
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addr &= (PNV9_XSCOM_SIZE - 1);
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return addr >> 3;
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}
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static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -1356,6 +1371,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
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k->dt_populate = pnv_chip_power9_dt_populate;
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k->pic_print_info = pnv_chip_power9_pic_print_info;
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k->xscom_core_base = pnv_chip_power9_xscom_core_base;
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k->xscom_pcba = pnv_chip_power9_xscom_pcba;
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dc->desc = "PowerNV Chip POWER9";
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device_class_set_parent_realize(dc, pnv_chip_power9_realize,
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@ -1421,6 +1437,12 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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(uint64_t) PNV10_LPCM_BASE(chip));
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}
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static uint32_t pnv_chip_power10_xscom_pcba(PnvChip *chip, uint64_t addr)
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{
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addr &= (PNV10_XSCOM_SIZE - 1);
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return addr >> 3;
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}
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static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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@ -1438,6 +1460,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
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k->dt_populate = pnv_chip_power10_dt_populate;
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k->pic_print_info = pnv_chip_power10_pic_print_info;
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k->xscom_core_base = pnv_chip_power10_xscom_core_base;
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k->xscom_pcba = pnv_chip_power10_xscom_pcba;
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dc->desc = "PowerNV Chip POWER10";
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device_class_set_parent_realize(dc, pnv_chip_power10_realize,
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@ -57,19 +57,7 @@ static void xscom_complete(CPUState *cs, uint64_t hmer_bits)
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static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr)
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{
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addr &= (PNV_XSCOM_SIZE - 1);
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switch (PNV_CHIP_GET_CLASS(chip)->chip_type) {
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case PNV_CHIP_POWER8E:
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case PNV_CHIP_POWER8:
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case PNV_CHIP_POWER8NVL:
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return ((addr >> 4) & ~0xfull) | ((addr >> 3) & 0xf);
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case PNV_CHIP_POWER9:
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case PNV_CHIP_POWER10:
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return addr >> 3;
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default:
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g_assert_not_reached();
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}
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return PNV_CHIP_GET_CLASS(chip)->xscom_pcba(chip, addr);
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}
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static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
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@ -138,6 +138,7 @@ typedef struct PnvChipClass {
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void (*dt_populate)(PnvChip *chip, void *fdt);
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void (*pic_print_info)(PnvChip *chip, Monitor *mon);
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uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
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uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
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} PnvChipClass;
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#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
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