ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

target-i386/helper: remove EBX macro 

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Richard Henderson  <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
liguang 2013-05-28 16:21:00 +08:00 committed by Blue Swirl
parent 4b34e3ad83
commit 70b513654c
5 changed files with 10 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
target-i386/cpu.h
View File

@ -1105,8 +1105,6 @@ static inline int cpu_mmu_index (CPUX86State *env)
#define ECX (env->regs[R_ECX]) #define ECX (env->regs[R_ECX])
#undef EDX #undef EDX
#define EDX (env->regs[R_EDX]) #define EDX (env->regs[R_EDX])
#undef EBX
#define EBX (env->regs[R_EBX])
#undef ESP #undef ESP
#define ESP (env->regs[R_ESP]) #define ESP (env->regs[R_ESP])
#undef EBP #undef EBP

4
target-i386/mem_helper.c
View File

@ -46,7 +46,7 @@ void helper_cmpxchg8b(CPUX86State *env, target_ulong a0)
eflags = cpu_cc_compute_all(env, CC_OP); eflags = cpu_cc_compute_all(env, CC_OP);
d = cpu_ldq_data(env, a0); d = cpu_ldq_data(env, a0);
if (d == (((uint64_t)EDX << 32) | (uint32_t)env->regs[R_EAX])) { if (d == (((uint64_t)EDX << 32) | (uint32_t)env->regs[R_EAX])) {
cpu_stq_data(env, a0, ((uint64_t)ECX << 32) | (uint32_t)EBX); cpu_stq_data(env, a0, ((uint64_t)ECX << 32) | (uint32_t)env->regs[R_EBX]);
eflags |= CC_Z; eflags |= CC_Z;
} else { } else {
/* always do the store */ /* always do the store */
@ -71,7 +71,7 @@ void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
d0 = cpu_ldq_data(env, a0); d0 = cpu_ldq_data(env, a0);
d1 = cpu_ldq_data(env, a0 + 8); d1 = cpu_ldq_data(env, a0 + 8);
if (d0 == env->regs[R_EAX] && d1 == EDX) { if (d0 == env->regs[R_EAX] && d1 == EDX) {
cpu_stq_data(env, a0, EBX); cpu_stq_data(env, a0, env->regs[R_EBX]);
cpu_stq_data(env, a0 + 8, ECX); cpu_stq_data(env, a0 + 8, ECX);
eflags |= CC_Z; eflags |= CC_Z;
} else { } else {

2
target-i386/misc_helper.c
View File

@ -124,7 +124,7 @@ void helper_cpuid(CPUX86State *env)
cpu_x86_cpuid(env, (uint32_t)env->regs[R_EAX], (uint32_t)ECX, &eax, &ebx, &ecx, &edx); cpu_x86_cpuid(env, (uint32_t)env->regs[R_EAX], (uint32_t)ECX, &eax, &ebx, &ecx, &edx);
env->regs[R_EAX] = eax; env->regs[R_EAX] = eax;
EBX = ebx; env->regs[R_EBX] = ebx;
ECX = ecx; ECX = ecx;
EDX = edx; EDX = edx;
} }

6
target-i386/seg_helper.c
View File

@ -327,7 +327,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
cpu_stl_kernel(env, env->tr.base + (0x28 + 0 * 4), env->regs[R_EAX]); cpu_stl_kernel(env, env->tr.base + (0x28 + 0 * 4), env->regs[R_EAX]);
cpu_stl_kernel(env, env->tr.base + (0x28 + 1 * 4), ECX); cpu_stl_kernel(env, env->tr.base + (0x28 + 1 * 4), ECX);
cpu_stl_kernel(env, env->tr.base + (0x28 + 2 * 4), EDX); cpu_stl_kernel(env, env->tr.base + (0x28 + 2 * 4), EDX);
cpu_stl_kernel(env, env->tr.base + (0x28 + 3 * 4), EBX); cpu_stl_kernel(env, env->tr.base + (0x28 + 3 * 4), env->regs[R_EBX]);
cpu_stl_kernel(env, env->tr.base + (0x28 + 4 * 4), ESP); cpu_stl_kernel(env, env->tr.base + (0x28 + 4 * 4), ESP);
cpu_stl_kernel(env, env->tr.base + (0x28 + 5 * 4), EBP); cpu_stl_kernel(env, env->tr.base + (0x28 + 5 * 4), EBP);
cpu_stl_kernel(env, env->tr.base + (0x28 + 6 * 4), ESI); cpu_stl_kernel(env, env->tr.base + (0x28 + 6 * 4), ESI);
@ -343,7 +343,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
cpu_stw_kernel(env, env->tr.base + (0x12 + 0 * 2), env->regs[R_EAX]); cpu_stw_kernel(env, env->tr.base + (0x12 + 0 * 2), env->regs[R_EAX]);
cpu_stw_kernel(env, env->tr.base + (0x12 + 1 * 2), ECX); cpu_stw_kernel(env, env->tr.base + (0x12 + 1 * 2), ECX);
cpu_stw_kernel(env, env->tr.base + (0x12 + 2 * 2), EDX); cpu_stw_kernel(env, env->tr.base + (0x12 + 2 * 2), EDX);
cpu_stw_kernel(env, env->tr.base + (0x12 + 3 * 2), EBX); cpu_stw_kernel(env, env->tr.base + (0x12 + 3 * 2), env->regs[R_EBX]);
cpu_stw_kernel(env, env->tr.base + (0x12 + 4 * 2), ESP); cpu_stw_kernel(env, env->tr.base + (0x12 + 4 * 2), ESP);
cpu_stw_kernel(env, env->tr.base + (0x12 + 5 * 2), EBP); cpu_stw_kernel(env, env->tr.base + (0x12 + 5 * 2), EBP);
cpu_stw_kernel(env, env->tr.base + (0x12 + 6 * 2), ESI); cpu_stw_kernel(env, env->tr.base + (0x12 + 6 * 2), ESI);
@ -399,7 +399,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
env->regs[R_EAX] = new_regs[0]; env->regs[R_EAX] = new_regs[0];
ECX = new_regs[1]; ECX = new_regs[1];
EDX = new_regs[2]; EDX = new_regs[2];
EBX = new_regs[3]; env->regs[R_EBX] = new_regs[3];
ESP = new_regs[4]; ESP = new_regs[4];
EBP = new_regs[5]; EBP = new_regs[5];
ESI = new_regs[6]; ESI = new_regs[6];

8
target-i386/smm_helper.c
View File

@ -85,7 +85,7 @@ void do_smm_enter(CPUX86State *env)
stq_phys(sm_state + 0x7ff8, env->regs[R_EAX]); stq_phys(sm_state + 0x7ff8, env->regs[R_EAX]);
stq_phys(sm_state + 0x7ff0, ECX); stq_phys(sm_state + 0x7ff0, ECX);
stq_phys(sm_state + 0x7fe8, EDX); stq_phys(sm_state + 0x7fe8, EDX);
stq_phys(sm_state + 0x7fe0, EBX); stq_phys(sm_state + 0x7fe0, env->regs[R_EBX]);
stq_phys(sm_state + 0x7fd8, ESP); stq_phys(sm_state + 0x7fd8, ESP);
stq_phys(sm_state + 0x7fd0, EBP); stq_phys(sm_state + 0x7fd0, EBP);
stq_phys(sm_state + 0x7fc8, ESI); stq_phys(sm_state + 0x7fc8, ESI);
@ -113,7 +113,7 @@ void do_smm_enter(CPUX86State *env)
stl_phys(sm_state + 0x7fe8, ESI); stl_phys(sm_state + 0x7fe8, ESI);
stl_phys(sm_state + 0x7fe4, EBP); stl_phys(sm_state + 0x7fe4, EBP);
stl_phys(sm_state + 0x7fe0, ESP); stl_phys(sm_state + 0x7fe0, ESP);
stl_phys(sm_state + 0x7fdc, EBX); stl_phys(sm_state + 0x7fdc, env->regs[R_EBX]);
stl_phys(sm_state + 0x7fd8, EDX); stl_phys(sm_state + 0x7fd8, EDX);
stl_phys(sm_state + 0x7fd4, ECX); stl_phys(sm_state + 0x7fd4, ECX);
stl_phys(sm_state + 0x7fd0, env->regs[R_EAX]); stl_phys(sm_state + 0x7fd0, env->regs[R_EAX]);
@ -216,7 +216,7 @@ void helper_rsm(CPUX86State *env)
env->regs[R_EAX] = ldq_phys(sm_state + 0x7ff8); env->regs[R_EAX] = ldq_phys(sm_state + 0x7ff8);
ECX = ldq_phys(sm_state + 0x7ff0); ECX = ldq_phys(sm_state + 0x7ff0);
EDX = ldq_phys(sm_state + 0x7fe8); EDX = ldq_phys(sm_state + 0x7fe8);
EBX = ldq_phys(sm_state + 0x7fe0); env->regs[R_EBX] = ldq_phys(sm_state + 0x7fe0);
ESP = ldq_phys(sm_state + 0x7fd8); ESP = ldq_phys(sm_state + 0x7fd8);
EBP = ldq_phys(sm_state + 0x7fd0); EBP = ldq_phys(sm_state + 0x7fd0);
ESI = ldq_phys(sm_state + 0x7fc8); ESI = ldq_phys(sm_state + 0x7fc8);
@ -248,7 +248,7 @@ void helper_rsm(CPUX86State *env)
ESI = ldl_phys(sm_state + 0x7fe8); ESI = ldl_phys(sm_state + 0x7fe8);
EBP = ldl_phys(sm_state + 0x7fe4); EBP = ldl_phys(sm_state + 0x7fe4);
ESP = ldl_phys(sm_state + 0x7fe0); ESP = ldl_phys(sm_state + 0x7fe0);
EBX = ldl_phys(sm_state + 0x7fdc); env->regs[R_EBX] = ldl_phys(sm_state + 0x7fdc);
EDX = ldl_phys(sm_state + 0x7fd8); EDX = ldl_phys(sm_state + 0x7fd8);
ECX = ldl_phys(sm_state + 0x7fd4); ECX = ldl_phys(sm_state + 0x7fd4);
env->regs[R_EAX] = ldl_phys(sm_state + 0x7fd0); env->regs[R_EAX] = ldl_phys(sm_state + 0x7fd0);