mirror of https://github.com/xemu-project/xemu.git
target/mips: Clean up handling of CP0 register 17
Clean up handling of CP0 register 17. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1567009614-12438-19-git-send-email-aleksandar.markovic@rt-rk.com>
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433efb4cca
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706ce14205
target/mips
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@ -6669,12 +6669,12 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_17:
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switch (sel) {
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case 0:
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case CP0_REG17__LLADDR:
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gen_mfhc0_load64(arg, offsetof(CPUMIPSState, CP0_LLAddr),
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ctx->CP0_LLAddr_shift);
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register_name = "LLAddr";
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break;
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case 1:
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case CP0_REG17__MAAR:
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CP0_CHECK(ctx->mrp);
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gen_helper_mfhc0_maar(arg, cpu_env);
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register_name = "MAAR";
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@ -6751,7 +6751,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_17:
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switch (sel) {
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case 0:
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case CP0_REG17__LLADDR:
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/*
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* LLAddr is read-only (the only exception is bit 0 if LLB is
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* supported); the CP0_LLAddr_rw_bitmask does not seem to be
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@ -6760,7 +6760,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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*/
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register_name = "LLAddr";
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break;
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case 1:
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case CP0_REG17__MAAR:
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CP0_CHECK(ctx->mrp);
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gen_helper_mthc0_maar(cpu_env, arg);
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register_name = "MAAR";
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@ -7285,16 +7285,16 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_17:
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switch (sel) {
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case 0:
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case CP0_REG17__LLADDR:
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gen_helper_mfc0_lladdr(arg, cpu_env);
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register_name = "LLAddr";
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break;
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case 1:
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case CP0_REG17__MAAR:
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CP0_CHECK(ctx->mrp);
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gen_helper_mfc0_maar(arg, cpu_env);
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register_name = "MAAR";
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break;
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case 2:
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case CP0_REG17__MAARI:
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CP0_CHECK(ctx->mrp);
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gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_MAARI));
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register_name = "MAARI";
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@ -8020,16 +8020,16 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_17:
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switch (sel) {
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case 0:
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case CP0_REG17__LLADDR:
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gen_helper_mtc0_lladdr(cpu_env, arg);
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register_name = "LLAddr";
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break;
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case 1:
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case CP0_REG17__MAAR:
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CP0_CHECK(ctx->mrp);
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gen_helper_mtc0_maar(cpu_env, arg);
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register_name = "MAAR";
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break;
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case 2:
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case CP0_REG17__MAARI:
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CP0_CHECK(ctx->mrp);
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gen_helper_mtc0_maari(cpu_env, arg);
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register_name = "MAARI";
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@ -8757,16 +8757,16 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_17:
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switch (sel) {
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case 0:
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case CP0_REG17__LLADDR:
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gen_helper_dmfc0_lladdr(arg, cpu_env);
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register_name = "LLAddr";
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break;
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case 1:
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case CP0_REG17__MAAR:
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CP0_CHECK(ctx->mrp);
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gen_helper_dmfc0_maar(arg, cpu_env);
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register_name = "MAAR";
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break;
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case 2:
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case CP0_REG17__MAARI:
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CP0_CHECK(ctx->mrp);
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gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_MAARI));
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register_name = "MAARI";
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@ -9474,16 +9474,16 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_17:
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switch (sel) {
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case 0:
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case CP0_REG17__LLADDR:
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gen_helper_mtc0_lladdr(cpu_env, arg);
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register_name = "LLAddr";
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break;
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case 1:
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case CP0_REG17__MAAR:
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CP0_CHECK(ctx->mrp);
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gen_helper_mtc0_maar(cpu_env, arg);
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register_name = "MAAR";
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break;
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case 2:
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case CP0_REG17__MAARI:
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CP0_CHECK(ctx->mrp);
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gen_helper_mtc0_maari(cpu_env, arg);
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register_name = "MAARI";
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