From 7033c0e6dd36cd2bfa9a323c3a51ecb0b55903fc Mon Sep 17 00:00:00 2001 From: Jiajie Chen Date: Tue, 22 Aug 2023 09:13:55 +0200 Subject: [PATCH] target/loongarch: Truncate high 32 bits of address in VA32 mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When running in VA32 mode(!LA64 or VA32L[1-3] matching PLV), virtual address is truncated to 32 bits before address mapping. Signed-off-by: Jiajie Chen Co-authored-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Song Gao Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20230822032724.1353391-6-gaosong@loongson.cn> Message-Id: <20230822071405.35386-10-philmd@linaro.org> --- target/loongarch/cpu.h | 6 +++++- target/loongarch/translate.c | 16 +++++++++++++++- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index e1562695e8..25a0ef7e41 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -445,7 +445,11 @@ static inline bool is_va32(CPULoongArchState *env) static inline void set_pc(CPULoongArchState *env, uint64_t value) { - env->pc = value; + if (is_va32(env)) { + env->pc = (uint32_t)value; + } else { + env->pc = value; + } } /* diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c index 8b26555a27..9a23ec786d 100644 --- a/target/loongarch/translate.c +++ b/target/loongarch/translate.c @@ -86,6 +86,10 @@ void generate_exception(DisasContext *ctx, int excp) static inline void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest) { + if (ctx->va32) { + dest = (uint32_t) dest; + } + if (translator_use_goto_tb(&ctx->base, dest)) { tcg_gen_goto_tb(n); tcg_gen_movi_tl(cpu_pc, dest); @@ -212,11 +216,17 @@ static TCGv make_address_x(DisasContext *ctx, TCGv base, TCGv addend) { TCGv temp = NULL; - if (addend) { + if (addend || ctx->va32) { temp = tcg_temp_new(); + } + if (addend) { tcg_gen_add_tl(temp, base, addend); base = temp; } + if (ctx->va32) { + tcg_gen_ext32u_tl(temp, base); + base = temp; + } return base; } @@ -262,6 +272,10 @@ static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) } ctx->base.pc_next += 4; + + if (ctx->va32) { + ctx->base.pc_next = (uint32_t)ctx->base.pc_next; + } } static void loongarch_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)