mirror of https://github.com/xemu-project/xemu.git
Merge 47510f053b
into ebec5e3028
This commit is contained in:
commit
6ec14c2733
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@ -0,0 +1,152 @@
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/*
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* MemoryRegion backed block driver
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*
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* Copyright (c) 2013 espes
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*
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* Based on "Add an in-memory block device" patch
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* Copyright IBM, Corp. 2007
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) version 3 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/cutils.h"
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#include "exec/memory.h"
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#include "block/block_int.h"
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#include "block/blkmemory.h"
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#define DEBUG_BLKMEMORY
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typedef struct BDRVMemoryState {
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uint64_t size;
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AddressSpace *as;
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} BDRVMemoryState;
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static int memory_open(BlockDriverState *bs, QDict *options, int flags,
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Error **errp)
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{
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/* We're kinda unique in that we're inited with a MemoryRegion instead
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* of a file. A MemoryRegion pointer can't be put in QDict, so we have
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* to be inited by hand. If something tries to init us normally, better
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* to fail than crash.
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*/
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return -1;
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}
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// FIXME: crash on close
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static void memory_close(BlockDriverState *bs)
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{
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/* nothing to do..? */
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}
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static int64_t memory_getlength(BlockDriverState *bs)
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{
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BDRVMemoryState *s = bs->opaque;
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return s->size / BDRV_SECTOR_SIZE;
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}
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static int memory_read(BlockDriverState *bs, int64_t offset,
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int64_t bytes, QEMUIOVector *qiov,
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BdrvRequestFlags flags)
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{
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BDRVMemoryState *s = bs->opaque;
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uint64_t sector_num = offset >> BDRV_SECTOR_BITS;
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int nb_sectors = bytes >> BDRV_SECTOR_BITS;
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uint8_t *buf;
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void *orig_buf;
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#ifdef DEBUG_BLKMEMORY
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printf("blkmemory read 0x%llx : %d\n", sector_num, nb_sectors);
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#endif
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sector_num = MIN(sector_num, bs->total_sectors - 1);
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size_t size = MIN(s->size - sector_num * BDRV_SECTOR_SIZE,
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nb_sectors * BDRV_SECTOR_SIZE);
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address_space_read(s->as, sector_num * BDRV_SECTOR_SIZE, MEMTXATTRS_UNSPECIFIED, buf, size);
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qemu_iovec_from_buf(qiov, 0, buf, size);
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return 0;
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}
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static int memory_write(BlockDriverState *bs,
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int64_t offset, int64_t bytes,
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QEMUIOVector *qiov,
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BdrvRequestFlags flags)
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{
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BDRVMemoryState *s = bs->opaque;
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uint64_t sector_num = offset >> BDRV_SECTOR_BITS;
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int nb_sectors = bytes >> BDRV_SECTOR_BITS;
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uint8_t *buf;
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void *orig_buf;
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#ifdef DEBUG_BLKMEMORY
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printf("blkmemory write 0x%llx : %d\n", sector_num, nb_sectors);
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#endif
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sector_num = MIN(sector_num, bs->total_sectors - 1);
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size_t size = MIN(s->size - sector_num * BDRV_SECTOR_SIZE,
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nb_sectors * BDRV_SECTOR_SIZE);
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address_space_write(s->as, sector_num * BDRV_SECTOR_SIZE, MEMTXATTRS_UNSPECIFIED, qiov->iov, size);
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return 0;
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}
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static BlockDriver bdrv_memory = {
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.format_name = "memory",
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.instance_size = sizeof(BDRVMemoryState),
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.bdrv_open = memory_open,
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.bdrv_close = memory_close,
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.bdrv_co_getlength = memory_getlength,
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// FIXME: Is this what we want? What's the difference between CO and AIO?
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.bdrv_co_preadv = memory_read,
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.bdrv_co_pwritev = memory_write,
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};
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static void bdrv_memory_init(void)
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{
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bdrv_register(&bdrv_memory);
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}
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block_init(bdrv_memory_init);
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int bdrv_memory_open(BlockDriverState *bs, AddressSpace *as, uint64_t size)
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{
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bs->total_sectors = (size + BDRV_SECTOR_SIZE-1) / BDRV_SECTOR_SIZE;
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//bs->read_only = false;
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//bs->is_temporary = false;
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bs->encrypted = false;
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pstrcpy(bs->filename, sizeof(bs->filename), "<mem>");
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bs->drv = &bdrv_memory;
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bs->opaque = g_malloc0(bdrv_memory.instance_size);
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if (!bs->opaque) {
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return -1;
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}
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BDRVMemoryState *s = bs->opaque;
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s->as = as;
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s->size = size;
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return 0;
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}
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@ -39,6 +39,7 @@ block_ss.add(files(
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'throttle.c',
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'throttle-groups.c',
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'write-threshold.c',
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'blkmemory.c',
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), zstd, zlib)
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system_ss.add(when: 'CONFIG_TCG', if_true: files('blkreplay.c'))
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@ -83,97 +83,6 @@ typedef struct ChihiroMachineClass {
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/*< public >*/
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} ChihiroMachineClass;
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#define SEGA_CHIP_REVISION 0xF0
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# define SEGA_CHIP_REVISION_CHIP_ID 0xFF00
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# define SEGA_CHIP_REVISION_FPGA_CHIP_ID 0x0000
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# define SEGA_CHIP_REVISION_ASIC_CHIP_ID 0x0100
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# define SEGA_CHIP_REVISION_REVISION_ID_MASK 0x00FF
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#define SEGA_DIMM_SIZE 0xF4
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# define SEGA_DIMM_SIZE_128M 0
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# define SEGA_DIMM_SIZE_256M 1
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# define SEGA_DIMM_SIZE_512M 2
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# define SEGA_DIMM_SIZE_1024M 3
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//#define DEBUG_CHIHIRO
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typedef struct ChihiroLPCState {
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ISADevice dev;
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MemoryRegion ioport;
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} ChihiroLPCState;
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#define CHIHIRO_LPC_DEVICE(obj) \
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OBJECT_CHECK(ChihiroLPCState, (obj), "chihiro-lpc")
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static uint64_t chhiro_lpc_io_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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uint64_t r = 0;
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switch (addr) {
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case SEGA_CHIP_REVISION:
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r = SEGA_CHIP_REVISION_ASIC_CHIP_ID;
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break;
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case SEGA_DIMM_SIZE:
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r = SEGA_DIMM_SIZE_128M;
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break;
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}
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#ifdef DEBUG_CHIHIRO
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printf("chihiro lpc read [0x%llx] -> 0x%llx\n", addr, r);
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#endif
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return r;
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}
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static void chhiro_lpc_io_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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#ifdef DEBUG_CHIHIRO
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printf("chihiro lpc write [0x%llx] = 0x%llx\n", addr, val);
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#endif
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}
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static const MemoryRegionOps chihiro_lpc_io_ops = {
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.read = chhiro_lpc_io_read,
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.write = chhiro_lpc_io_write,
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.impl = {
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.min_access_size = 2,
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.max_access_size = 2,
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},
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};
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static void chihiro_lpc_realize(DeviceState *dev, Error **errp)
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{
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ChihiroLPCState *s = CHIHIRO_LPC_DEVICE(dev);
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ISADevice *isa = ISA_DEVICE(dev);
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memory_region_init_io(&s->ioport, OBJECT(dev), &chihiro_lpc_io_ops, s,
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"chihiro-lpc-io", 0x100);
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isa_register_ioport(isa, &s->ioport, 0x4000);
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}
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static void chihiro_lpc_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = chihiro_lpc_realize;
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dc->desc = "Chihiro LPC";
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}
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static const TypeInfo chihiro_lpc_info = {
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.name = "chihiro-lpc",
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(ChihiroLPCState),
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.class_init = chihiro_lpc_class_initfn,
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};
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static void chihiro_register_types(void)
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{
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type_register_static(&chihiro_lpc_info);
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}
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type_init(chihiro_register_types)
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/* The chihiro baseboard communicates with the xbox by acting as an IDE
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* device. The device maps the boot rom from the mediaboard, a communication
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* area for interfacing with the network board, and the ram on the baseboard.
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@ -285,7 +194,7 @@ static void chihiro_init(MachineState *machine)
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ISABus *isa_bus;
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xbox_init_common(machine, NULL, &isa_bus);
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isa_create_simple(isa_bus, "chihiro-lpc");
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isa_create_simple(isa_bus, "lpcsega");
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}
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static void chihiro_machine_options(MachineClass *m)
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@ -0,0 +1,138 @@
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/*
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* QEMU Chihiro emulation
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*
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* Copyright (c) 2013 espes
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* Copyright (c) 2018-2021 Matt Borgerson
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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||||
* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
|
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
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||||
*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "hw/qdev-properties.h"
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#include "hw/qdev-properties-system.h"
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#include "migration/vmstate.h"
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#include "sysemu/sysemu.h"
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#include "hw/char/serial.h"
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#include "hw/isa/isa.h"
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#include "qapi/error.h"
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#define SEGA_CHIP_REVISION 0xF0
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# define SEGA_CHIP_REVISION_CHIP_ID 0xFF00
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# define SEGA_CHIP_REVISION_FPGA_CHIP_ID 0x0000
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# define SEGA_CHIP_REVISION_ASIC_CHIP_ID 0x0100
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# define SEGA_CHIP_REVISION_REVISION_ID_MASK 0x00FF
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#define SEGA_DIMM_SIZE 0xF4
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# define SEGA_DIMM_SIZE_128M 0
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# define SEGA_DIMM_SIZE_256M 1
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# define SEGA_DIMM_SIZE_512M 2
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# define SEGA_DIMM_SIZE_1024M 3
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#define TYPE_ISA_LPCSEGA_DEVICE "lpcsega"
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#define ISA_LPCSEGA_DEVICE(obj) \
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OBJECT_CHECK(ISALPCSEGAState, (obj), TYPE_ISA_LPCSEGA_DEVICE)
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#define DEBUG_SEGA
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#ifdef DEBUG_SEGA
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# define DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
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#else
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# define DPRINTF(format, ...) do { } while (0)
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#endif
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typedef struct LPCSEGAState {
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MemoryRegion io;
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} LPCSEGAState;
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typedef struct ISALPCSEGAState {
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ISADevice parent_obj;
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bool sysopt;
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uint16_t iobase;
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LPCSEGAState state;
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} ISALPCSEGAState;
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static void lpcsega_io_write(void *opaque, hwaddr addr, uint64_t val,
|
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unsigned int size)
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||||
{
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DPRINTF("lpcsega io write 0x%02" HWADDR_PRIx " = 0x%02" PRIx64 "\n", addr, val);
|
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}
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static uint64_t lpcsega_io_read(void *opaque, hwaddr addr, unsigned int size)
|
||||
{
|
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uint32_t val = 0;
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switch (addr) {
|
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case SEGA_CHIP_REVISION:
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val = SEGA_CHIP_REVISION_ASIC_CHIP_ID;
|
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break;
|
||||
case SEGA_DIMM_SIZE:
|
||||
val = SEGA_DIMM_SIZE_128M;
|
||||
break;
|
||||
}
|
||||
|
||||
DPRINTF("lpcsega io read 0x%02" HWADDR_PRIx " -> 0x%02x\n", addr, val);
|
||||
|
||||
return val;
|
||||
}
|
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|
||||
static const MemoryRegionOps lpcsega_io_ops = {
|
||||
.read = lpcsega_io_read,
|
||||
.write = lpcsega_io_write,
|
||||
.valid = {
|
||||
.min_access_size = 2,
|
||||
.max_access_size = 2,
|
||||
},
|
||||
};
|
||||
|
||||
static void lpcsega_realize(DeviceState *dev, Error **errp)
|
||||
{
|
||||
ISADevice *isadev = ISA_DEVICE(dev);
|
||||
ISALPCSEGAState *isa = ISA_LPCSEGA_DEVICE(isadev);
|
||||
LPCSEGAState *s = &isa->state;
|
||||
|
||||
memory_region_init_io(&s->io, OBJECT(dev), &lpcsega_io_ops, s,
|
||||
"lpcsega-io", 0x100);
|
||||
isa_register_ioport(isadev, &s->io, 0x4000);
|
||||
}
|
||||
|
||||
static Property lpcsega_properties[] = {
|
||||
DEFINE_PROP_BOOL("sysopt", ISALPCSEGAState, sysopt, false),
|
||||
DEFINE_PROP_END_OF_LIST(),
|
||||
};
|
||||
|
||||
static void lpcsega_class_init(ObjectClass *klass, void *data)
|
||||
{
|
||||
DeviceClass *dc = DEVICE_CLASS(klass);
|
||||
|
||||
dc->realize = lpcsega_realize;
|
||||
device_class_set_props(dc, lpcsega_properties);
|
||||
}
|
||||
|
||||
static void lpcsega_initfn(Object *o)
|
||||
{
|
||||
}
|
||||
|
||||
static const TypeInfo lpcsega_type_info = {
|
||||
.name = TYPE_ISA_LPCSEGA_DEVICE,
|
||||
.parent = TYPE_ISA_DEVICE,
|
||||
.instance_init = lpcsega_initfn,
|
||||
.instance_size = sizeof(ISALPCSEGAState),
|
||||
.class_init = lpcsega_class_init,
|
||||
};
|
||||
|
||||
static void lpcsega_register_types(void)
|
||||
{
|
||||
type_register_static(&lpcsega_type_info);
|
||||
}
|
||||
|
||||
type_init(lpcsega_register_types)
|
|
@ -5,6 +5,7 @@ specific_ss.add(files(
|
|||
# 'chihiro.c',
|
||||
'eeprom_generation.c',
|
||||
'lpc47m157.c',
|
||||
'lpcsega.c',
|
||||
'nvnet.c',
|
||||
'smbus_adm1032.c',
|
||||
'smbus_cx25871.c',
|
||||
|
|
|
@ -352,6 +352,7 @@ void xbox_smc_eject_button(void)
|
|||
// interaction.
|
||||
void xbox_smc_update_tray_state(void)
|
||||
{
|
||||
#ifndef CHIHIRO
|
||||
Object *obj = object_resolve_path_type("", TYPE_XBOX_SMC, NULL);
|
||||
SMBusSMCDevice *smc = XBOX_SMC(obj);
|
||||
|
||||
|
@ -371,4 +372,5 @@ void xbox_smc_update_tray_state(void)
|
|||
}
|
||||
|
||||
xbox_assert_extsmi();
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -0,0 +1,9 @@
|
|||
#ifndef BLKMEMORY_H
|
||||
#define BLKMEMORY_H
|
||||
|
||||
#include "block/block_int.h"
|
||||
#include "exec/memory.h"
|
||||
|
||||
int bdrv_memory_open(BlockDriverState *bs, AddressSpace *as, uint64_t size);
|
||||
|
||||
#endif
|
|
@ -2981,6 +2981,7 @@ void qemu_init(int argc, char **argv)
|
|||
}
|
||||
}
|
||||
|
||||
#ifndef CHIHIRO
|
||||
// Always populate DVD drive. If disc path is the empty string, drive is
|
||||
// connected but no media present.
|
||||
fake_argv[fake_argc++] = strdup("-drive");
|
||||
|
@ -2988,6 +2989,7 @@ void qemu_init(int argc, char **argv)
|
|||
fake_argv[fake_argc++] = g_strdup_printf("index=1,media=cdrom,file=%s",
|
||||
escaped_dvd_path);
|
||||
free(escaped_dvd_path);
|
||||
#endif
|
||||
|
||||
fake_argv[fake_argc++] = strdup("-display");
|
||||
fake_argv[fake_argc++] = strdup("xemu");
|
||||
|
|
Loading…
Reference in New Issue