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target/arm: Restrict v8M IDAU to TCG 

IDAU is specific to M-profile. KVM only supports A-profile.
Restrict this interface to TCG, as it is pointless (and
confusing) on a KVM-only build.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210221222617.2579610-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-02-21 23:26:15 +01:00 committed by Peter Maydell
parent 2d928adf8a
commit 6e937ba7f8
2 changed files with 8 additions and 7 deletions
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7
target/arm/cpu.c
View File

@ -2384,12 +2384,6 @@ static const TypeInfo arm_cpu_type_info = {
.class_init = arm_cpu_class_init, .class_init = arm_cpu_class_init,
}; };
static const TypeInfo idau_interface_type_info = {
.name = TYPE_IDAU_INTERFACE,
.parent = TYPE_INTERFACE,
.class_size = sizeof(IDAUInterfaceClass),
};
static void arm_cpu_register_types(void) static void arm_cpu_register_types(void)
{ {
const size_t cpu_count = ARRAY_SIZE(arm_cpus); const size_t cpu_count = ARRAY_SIZE(arm_cpus);
@ -2403,7 +2397,6 @@ static void arm_cpu_register_types(void)
if (cpu_count) { if (cpu_count) {
size_t i; size_t i;
type_register_static(&idau_interface_type_info);
for (i = 0; i < cpu_count; ++i) { for (i = 0; i < cpu_count; ++i) {
arm_cpu_register(&arm_cpus[i]); arm_cpu_register(&arm_cpus[i]);
} }

8
target/arm/cpu_tcg.c
View File

@ -14,6 +14,7 @@
#include "hw/core/tcg-cpu-ops.h" #include "hw/core/tcg-cpu-ops.h"
#endif /* CONFIG_TCG */ #endif /* CONFIG_TCG */
#include "internals.h" #include "internals.h"
#include "target/arm/idau.h"
/* CPU models. These are not needed for the AArch64 linux-user build. */ /* CPU models. These are not needed for the AArch64 linux-user build. */
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
@ -739,10 +740,17 @@ static const ARMCPUInfo arm_tcg_cpus[] = {
{ .name = "pxa270-c5", .initfn = pxa270c5_initfn }, { .name = "pxa270-c5", .initfn = pxa270c5_initfn },
}; };
static const TypeInfo idau_interface_type_info = {
.name = TYPE_IDAU_INTERFACE,
.parent = TYPE_INTERFACE,
.class_size = sizeof(IDAUInterfaceClass),
};
static void arm_tcg_cpu_register_types(void) static void arm_tcg_cpu_register_types(void)
{ {
size_t i; size_t i;
type_register_static(&idau_interface_type_info);
for (i = 0; i < ARRAY_SIZE(arm_tcg_cpus); ++i) { for (i = 0; i < ARRAY_SIZE(arm_tcg_cpus); ++i) {
arm_cpu_register(&arm_tcg_cpus[i]); arm_cpu_register(&arm_tcg_cpus[i]);
} }