From 6e0c849275250ff9d1b3b2ae32f6a4b1247ed745 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Wed, 27 Sep 2023 16:12:03 +0100 Subject: [PATCH] docs/specs/virt-ctlr: Convert to rST MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert docs/specs/virt-ctlr.txt to rST format. I added the name of the device to give readers a bit more idea of which device we're actually documenting here. Signed-off-by: Peter Maydell Message-id: 20230927151205.70930-7-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daudé --- MAINTAINERS | 1 + docs/specs/index.rst | 1 + docs/specs/{virt-ctlr.txt => virt-ctlr.rst} | 12 +++++------- 3 files changed, 7 insertions(+), 7 deletions(-) rename docs/specs/{virt-ctlr.txt => virt-ctlr.rst} (70%) diff --git a/MAINTAINERS b/MAINTAINERS index b5e1765d7a..11f3bdbfa7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1283,6 +1283,7 @@ F: include/hw/char/goldfish_tty.h F: include/hw/intc/goldfish_pic.h F: include/hw/intc/m68k_irqc.h F: include/hw/misc/virt_ctrl.h +F: docs/specs/virt-ctlr.rst MicroBlaze Machines ------------------- diff --git a/docs/specs/index.rst b/docs/specs/index.rst index ee84b8109d..8d30968650 100644 --- a/docs/specs/index.rst +++ b/docs/specs/index.rst @@ -29,3 +29,4 @@ guest hardware that is specific to QEMU. ivshmem-spec pvpanic standard-vga + virt-ctlr diff --git a/docs/specs/virt-ctlr.txt b/docs/specs/virt-ctlr.rst similarity index 70% rename from docs/specs/virt-ctlr.txt rename to docs/specs/virt-ctlr.rst index 24d38084f7..ad3edde82d 100644 --- a/docs/specs/virt-ctlr.txt +++ b/docs/specs/virt-ctlr.rst @@ -1,9 +1,9 @@ Virtual System Controller ========================= -This device is a simple interface defined for the pure virtual machine with no -hardware reference implementation to allow the guest kernel to send command -to the host hypervisor. +The ``virt-ctrl`` device is a simple interface defined for the pure +virtual machine with no hardware reference implementation to allow the +guest kernel to send command to the host hypervisor. The specification can evolve, the current state is defined as below. @@ -11,14 +11,12 @@ This is a MMIO mapped device using 256 bytes. Two 32bit registers are defined: -1- the features register (read-only, address 0x00) - +the features register (read-only, address 0x00) This register allows the device to report features supported by the controller. The only feature supported for the moment is power control (0x01). -2- the command register (write-only, address 0x04) - +the command register (write-only, address 0x04) This register allows the kernel to send the commands to the hypervisor. The implemented commands are part of the power control feature and are reset (1), halt (2) and panic (3).