mirror of https://github.com/xemu-project/xemu.git
Fix memory allocation on mainstone2 and convert to qemu_ram_alloc.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3889 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -19,7 +19,7 @@
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- OMAP310 MPU emulation plus Palm T|E machine (Andrzej Zaborowski)
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- OMAP310 MPU emulation plus Palm T|E machine (Andrzej Zaborowski)
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- ARM v6, v7, NEON SIMD and SMP emulation (Paul Brook/CodeSourcery)
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- ARM v6, v7, NEON SIMD and SMP emulation (Paul Brook/CodeSourcery)
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- Gumstix boards: connex and verdex emulation (Thorsten Zitterell)
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- Gumstix boards: connex and verdex emulation (Thorsten Zitterell)
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- Intel mainstone board emulation (Armin Kuster)
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- Intel mainstone II board emulation (Armin Kuster)
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- VMware SVGA II graphics card support (Andrzej Zaborowski)
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- VMware SVGA II graphics card support (Andrzej Zaborowski)
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version 0.9.0:
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version 0.9.0:
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@ -66,17 +66,22 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
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{
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{
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uint32_t mainstone_ram = 0x04000000;
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uint32_t mainstone_ram = 0x04000000;
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uint32_t mainstone_rom = 0x00800000;
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uint32_t mainstone_rom = 0x00800000;
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uint32_t mainstone_flash = 0x02000000;
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uint32_t sector_len = 256 * 1024;
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target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
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struct pxa2xx_state_s *cpu;
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struct pxa2xx_state_s *cpu;
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qemu_irq *mst_irq;
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qemu_irq *mst_irq;
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int index;
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int i, index;
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if (!cpu_model)
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if (!cpu_model)
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cpu_model = "pxa270-c5";
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cpu_model = "pxa270-c5";
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/* Setup CPU & memory */
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/* Setup CPU & memory */
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if (ram_size < mainstone_ram + mainstone_rom + PXA2XX_INTERNAL_SIZE) {
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if (ram_size < mainstone_ram + mainstone_rom + 2 * mainstone_flash +
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PXA2XX_INTERNAL_SIZE) {
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fprintf(stderr, "This platform requires %i bytes of memory\n",
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fprintf(stderr, "This platform requires %i bytes of memory\n",
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mainstone_ram + mainstone_rom + PXA2XX_INTERNAL_SIZE);
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mainstone_ram + mainstone_rom + 2 * mainstone_flash +
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PXA2XX_INTERNAL_SIZE);
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exit(1);
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exit(1);
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}
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}
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@ -88,33 +93,22 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
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cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
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cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
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/* There are two 32MiB flash devices on the board */
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/* There are two 32MiB flash devices on the board */
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index = drive_get_index(IF_PFLASH, 0, 0);
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for (i = 0; i < 2; i ++) {
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index = drive_get_index(IF_PFLASH, 0, i);
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if (index == -1) {
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if (index == -1) {
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fprintf(stderr, "Two flash images must be given with the "
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fprintf(stderr, "Two flash images must be given with the "
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"'pflash' parameter\n");
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"'pflash' parameter\n");
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exit(1);
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exit(1);
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}
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}
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if (!pflash_cfi01_register(MST_FLASH_0,
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mainstone_ram + PXA2XX_INTERNAL_SIZE,
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drives_table[index].bdrv,
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256 * 1024, 128, 4, 0, 0, 0, 0)) {
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fprintf(stderr, "qemu: Error registering flash memory.\n");
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exit(1);
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}
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index = drive_get_index(IF_PFLASH, 0, 1);
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if (!pflash_cfi01_register(mainstone_flash_base[i],
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if (index == -1) {
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qemu_ram_alloc(mainstone_flash),
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fprintf(stderr, "Two flash images must be given with the "
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drives_table[index].bdrv, sector_len,
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"'pflash' parameter\n");
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mainstone_flash / sector_len, 4, 0, 0, 0, 0)) {
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exit(1);
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}
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if (!pflash_cfi01_register(MST_FLASH_1,
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mainstone_ram + PXA2XX_INTERNAL_SIZE,
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drives_table[index].bdrv,
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256 * 1024, 128, 4, 0, 0, 0, 0)) {
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fprintf(stderr, "qemu: Error registering flash memory.\n");
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fprintf(stderr, "qemu: Error registering flash memory.\n");
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exit(1);
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exit(1);
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}
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}
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}
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mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
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mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
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