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tests/tcg: target/mips: Extend functionality of MSA wrapper macros 

Add macros that will allow testing cases when one of the source
registers is identical to the destination register.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1551800076-8104-8-git-send-email-aleksandar.markovic@rt-rk.com>
This commit is contained in:
Aleksandar Markovic 2019-03-05 16:34:29 +01:00
parent dd3ba7036f
commit 6ae2e3bb33
1 changed files with 51 additions and 0 deletions
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51
tests/tcg/mips/include/wrappers_msa.h
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@ -38,6 +38,21 @@ static inline void do_msa_##suffix(void *input, void *output) \
); \ ); \
} }
#define DO_MSA__WD__WD(suffix, mnemonic) \
static inline void do_msa_##suffix(void *input, void *output) \
{ \
__asm__ volatile ( \
"move $t0, %0\n\t" \
"ld.d $w11, 0($t0)\n\t" \
#mnemonic " $w10, $w10\n\t" \
"move $t0, %1\n\t" \
"st.d $w10, 0($t0)\n\t" \
: \
: "r" (input), "r" (output) \
: "t0", "memory" \
); \
}
DO_MSA__WD__WS(NLOC_B, nloc.b) DO_MSA__WD__WS(NLOC_B, nloc.b)
DO_MSA__WD__WS(NLOC_H, nloc.h) DO_MSA__WD__WS(NLOC_H, nloc.h)
DO_MSA__WD__WS(NLOC_W, nloc.w) DO_MSA__WD__WS(NLOC_W, nloc.w)
@ -72,6 +87,42 @@ static inline void do_msa_##suffix(void *input1, void *input2, \
); \ ); \
} }
#define DO_MSA__WD__WD_WT(suffix, mnemonic) \
static inline void do_msa_##suffix(void *input1, void *input2, \
void *output) \
{ \
__asm__ volatile ( \
"move $t0, %0\n\t" \
"ld.d $w11, 0($t0)\n\t" \
"move $t0, %1\n\t" \
"ld.d $w12, 0($t0)\n\t" \
#mnemonic " $w10, $w10, $w12\n\t" \
"move $t0, %2\n\t" \
"st.d $w10, 0($t0)\n\t" \
: \
: "r" (input1), "r" (input2), "r" (output) \
: "t0", "memory" \
); \
}
#define DO_MSA__WD__WS_WD(suffix, mnemonic) \
static inline void do_msa_##suffix(void *input1, void *input2, \
void *output) \
{ \
__asm__ volatile ( \
"move $t0, %0\n\t" \
"ld.d $w11, 0($t0)\n\t" \
"move $t0, %1\n\t" \
"ld.d $w12, 0($t0)\n\t" \
#mnemonic " $w10, $w11, $w10\n\t" \
"move $t0, %2\n\t" \
"st.d $w10, 0($t0)\n\t" \
: \
: "r" (input1), "r" (input2), "r" (output) \
: "t0", "memory" \
); \
}
DO_MSA__WD__WS_WT(ILVEV_B, ilvev.b) DO_MSA__WD__WS_WT(ILVEV_B, ilvev.b)
DO_MSA__WD__WS_WT(ILVEV_H, ilvev.h) DO_MSA__WD__WS_WT(ILVEV_H, ilvev.h)
DO_MSA__WD__WS_WT(ILVEV_W, ilvev.w) DO_MSA__WD__WS_WT(ILVEV_W, ilvev.w)