mirror of https://github.com/xemu-project/xemu.git
hw/ide/via: Wire up IDE legacy interrupts in host device
Resolves circular depencency between IDE function and south bridge. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20230531211043.41724-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -31,6 +31,7 @@
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#include "sysemu/dma.h"
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#include "sysemu/dma.h"
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#include "hw/isa/vt82c686.h"
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#include "hw/isa/vt82c686.h"
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#include "hw/ide/pci.h"
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#include "hw/ide/pci.h"
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#include "hw/irq.h"
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#include "trace.h"
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#include "trace.h"
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static uint64_t bmdma_read(void *opaque, hwaddr addr,
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static uint64_t bmdma_read(void *opaque, hwaddr addr,
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@ -104,7 +105,8 @@ static void bmdma_setup_bar(PCIIDEState *d)
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static void via_ide_set_irq(void *opaque, int n, int level)
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static void via_ide_set_irq(void *opaque, int n, int level)
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{
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{
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PCIDevice *d = PCI_DEVICE(opaque);
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PCIIDEState *s = opaque;
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PCIDevice *d = PCI_DEVICE(s);
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if (level) {
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if (level) {
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d->config[0x70 + n * 8] |= 0x80;
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d->config[0x70 + n * 8] |= 0x80;
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@ -112,7 +114,7 @@ static void via_ide_set_irq(void *opaque, int n, int level)
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d->config[0x70 + n * 8] &= ~0x80;
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d->config[0x70 + n * 8] &= ~0x80;
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}
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}
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via_isa_set_irq(pci_get_function_0(d), 14 + n, level);
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qemu_set_irq(s->isa_irq[n], level);
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}
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}
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static void via_ide_reset(DeviceState *dev)
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static void via_ide_reset(DeviceState *dev)
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@ -692,6 +692,10 @@ static void via_isa_realize(PCIDevice *d, Error **errp)
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if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) {
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if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) {
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return;
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return;
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}
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}
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for (i = 0; i < 2; i++) {
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qdev_connect_gpio_out_named(DEVICE(&s->ide), "isa-irq", i,
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s->isa_irqs_in[14 + i]);
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}
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/* Functions 2-3: USB Ports */
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/* Functions 2-3: USB Ports */
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for (i = 0; i < ARRAY_SIZE(s->uhci); i++) {
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for (i = 0; i < ARRAY_SIZE(s->uhci); i++) {
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@ -814,6 +818,7 @@ static void vt8231_isa_reset(DeviceState *dev)
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PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL);
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PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL);
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pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM);
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pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM);
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pci_conf[0x4c] = 0x04; /* IDE interrupt Routing */
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pci_conf[0x58] = 0x40; /* Miscellaneous Control 0 */
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pci_conf[0x58] = 0x40; /* Miscellaneous Control 0 */
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pci_conf[0x67] = 0x08; /* Fast IR Config */
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pci_conf[0x67] = 0x08; /* Fast IR Config */
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pci_conf[0x6b] = 0x01; /* Fast IR I/O Base */
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pci_conf[0x6b] = 0x01; /* Fast IR I/O Base */
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