ppc/xics: store the ICS object under the sPAPR machine

A list of ICS objects was introduced under the XICS object for the
PowerNV machine but, for the sPAPR machine, it brings extra complexity
as there is only a single ICS. To simplify the code, let's add the ICS
pointer under the sPAPR machine and try to reduce the use of this list
where possible.

Also, change the xics_spapr_*() routines to use an ICS object instead
of an XICSState and change their name to reflect that these are
specific to the sPAPR ICS object.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2017-02-27 15:29:12 +01:00 committed by David Gibson
parent 817bb6a446
commit 681bfaded6
7 changed files with 29 additions and 28 deletions

View File

@ -118,7 +118,7 @@ static void rtas_set_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t nargs, target_ulong args, uint32_t nargs, target_ulong args,
uint32_t nret, target_ulong rets) uint32_t nret, target_ulong rets)
{ {
ICSState *ics = QLIST_FIRST(&spapr->xics->ics); ICSState *ics = spapr->ics;
uint32_t nr, srcno, server, priority; uint32_t nr, srcno, server, priority;
if ((nargs != 3) || (nret != 1)) { if ((nargs != 3) || (nret != 1)) {
@ -151,7 +151,7 @@ static void rtas_get_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t nargs, target_ulong args, uint32_t nargs, target_ulong args,
uint32_t nret, target_ulong rets) uint32_t nret, target_ulong rets)
{ {
ICSState *ics = QLIST_FIRST(&spapr->xics->ics); ICSState *ics = spapr->ics;
uint32_t nr, srcno; uint32_t nr, srcno;
if ((nargs != 1) || (nret != 3)) { if ((nargs != 1) || (nret != 3)) {
@ -181,7 +181,7 @@ static void rtas_int_off(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t nargs, target_ulong args, uint32_t nargs, target_ulong args,
uint32_t nret, target_ulong rets) uint32_t nret, target_ulong rets)
{ {
ICSState *ics = QLIST_FIRST(&spapr->xics->ics); ICSState *ics = spapr->ics;
uint32_t nr, srcno; uint32_t nr, srcno;
if ((nargs != 1) || (nret != 1)) { if ((nargs != 1) || (nret != 1)) {
@ -212,7 +212,7 @@ static void rtas_int_on(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t nargs, target_ulong args, uint32_t nargs, target_ulong args,
uint32_t nret, target_ulong rets) uint32_t nret, target_ulong rets)
{ {
ICSState *ics = QLIST_FIRST(&spapr->xics->ics); ICSState *ics = spapr->ics;
uint32_t nr, srcno; uint32_t nr, srcno;
if ((nargs != 1) || (nret != 1)) { if ((nargs != 1) || (nret != 1)) {
@ -294,9 +294,8 @@ static int ics_find_free_block(ICSState *ics, int num, int alignnum)
return -1; return -1;
} }
int xics_spapr_alloc(XICSState *xics, int irq_hint, bool lsi, Error **errp) int spapr_ics_alloc(ICSState *ics, int irq_hint, bool lsi, Error **errp)
{ {
ICSState *ics = QLIST_FIRST(&xics->ics);
int irq; int irq;
if (!ics) { if (!ics) {
@ -327,10 +326,9 @@ int xics_spapr_alloc(XICSState *xics, int irq_hint, bool lsi, Error **errp)
* Allocate block of consecutive IRQs, and return the number of the first IRQ in * Allocate block of consecutive IRQs, and return the number of the first IRQ in
* the block. If align==true, aligns the first IRQ number to num. * the block. If align==true, aligns the first IRQ number to num.
*/ */
int xics_spapr_alloc_block(XICSState *xics, int num, bool lsi, bool align, int spapr_ics_alloc_block(ICSState *ics, int num, bool lsi,
Error **errp) bool align, Error **errp)
{ {
ICSState *ics = QLIST_FIRST(&xics->ics);
int i, first = -1; int i, first = -1;
if (!ics) { if (!ics) {
@ -380,11 +378,9 @@ static void ics_free(ICSState *ics, int srcno, int num)
} }
} }
void xics_spapr_free(XICSState *xics, int irq, int num) void spapr_ics_free(ICSState *ics, int irq, int num)
{ {
ICSState *ics = xics_find_source(xics, irq); if (ics_valid_irq(ics, irq)) {
if (ics) {
trace_xics_ics_free(0, irq, num); trace_xics_ics_free(0, irq, num);
ics_free(ics, irq - ics->offset, num); ics_free(ics, irq - ics->offset, num);
} }

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@ -95,7 +95,8 @@
#define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift)) #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
static XICSState *try_create_xics(const char *type, const char *type_ics, static XICSState *try_create_xics(sPAPRMachineState *spapr,
const char *type, const char *type_ics,
const char *type_icp, int nr_servers, const char *type_icp, int nr_servers,
int nr_irqs, Error **errp) int nr_irqs, Error **errp)
{ {
@ -112,7 +113,7 @@ static XICSState *try_create_xics(const char *type, const char *type_ics,
} }
ics = ICS_SIMPLE(object_new(type_ics)); ics = ICS_SIMPLE(object_new(type_ics));
object_property_add_child(OBJECT(xics), "ics", OBJECT(ics), NULL); object_property_add_child(OBJECT(spapr), "ics", OBJECT(ics), NULL);
object_property_set_int(OBJECT(ics), nr_irqs, "nr-irqs", &err); object_property_set_int(OBJECT(ics), nr_irqs, "nr-irqs", &err);
object_property_add_const_link(OBJECT(ics), "xics", OBJECT(xics), NULL); object_property_add_const_link(OBJECT(ics), "xics", OBJECT(xics), NULL);
object_property_set_bool(OBJECT(ics), true, "realized", &local_err); object_property_set_bool(OBJECT(ics), true, "realized", &local_err);
@ -138,6 +139,7 @@ static XICSState *try_create_xics(const char *type, const char *type_ics,
object_unref(OBJECT(icp)); object_unref(OBJECT(icp));
} }
spapr->ics = ics;
return xics; return xics;
error: error:
@ -158,7 +160,8 @@ static XICSState *xics_system_init(MachineState *machine,
Error *err = NULL; Error *err = NULL;
if (machine_kernel_irqchip_allowed(machine)) { if (machine_kernel_irqchip_allowed(machine)) {
xics = try_create_xics(TYPE_XICS_SPAPR_KVM, TYPE_ICS_KVM, xics = try_create_xics(SPAPR_MACHINE(machine),
TYPE_XICS_SPAPR_KVM, TYPE_ICS_KVM,
TYPE_KVM_ICP, nr_servers, nr_irqs, &err); TYPE_KVM_ICP, nr_servers, nr_irqs, &err);
} }
if (machine_kernel_irqchip_required(machine) && !xics) { if (machine_kernel_irqchip_required(machine) && !xics) {
@ -170,8 +173,9 @@ static XICSState *xics_system_init(MachineState *machine,
} }
if (!xics) { if (!xics) {
xics = try_create_xics(TYPE_XICS_SPAPR, TYPE_ICS_SIMPLE, TYPE_ICP, xics = try_create_xics(SPAPR_MACHINE(machine),
nr_servers, nr_irqs, errp); TYPE_XICS_SPAPR, TYPE_ICS_SIMPLE,
TYPE_ICP, nr_servers, nr_irqs, errp);
} }
return xics; return xics;

View File

@ -752,7 +752,7 @@ void spapr_events_init(sPAPRMachineState *spapr)
spapr->event_sources = spapr_event_sources_new(); spapr->event_sources = spapr_event_sources_new();
spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_EPOW, spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_EPOW,
xics_spapr_alloc(spapr->xics, 0, false, spapr_ics_alloc(spapr->ics, 0, false,
&error_fatal)); &error_fatal));
/* NOTE: if machine supports modern/dedicated hotplug event source, /* NOTE: if machine supports modern/dedicated hotplug event source,
@ -765,7 +765,7 @@ void spapr_events_init(sPAPRMachineState *spapr)
*/ */
if (spapr->use_hotplug_event_source) { if (spapr->use_hotplug_event_source) {
spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_HOT_PLUG, spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_HOT_PLUG,
xics_spapr_alloc(spapr->xics, 0, false, spapr_ics_alloc(spapr->ics, 0, false,
&error_fatal)); &error_fatal));
} }

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@ -326,7 +326,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
return; return;
} }
xics_spapr_free(spapr->xics, msi->first_irq, msi->num); spapr_ics_free(spapr->ics, msi->first_irq, msi->num);
if (msi_present(pdev)) { if (msi_present(pdev)) {
spapr_msi_setmsg(pdev, 0, false, 0, 0); spapr_msi_setmsg(pdev, 0, false, 0, 0);
} }
@ -364,7 +364,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
} }
/* Allocate MSIs */ /* Allocate MSIs */
irq = xics_spapr_alloc_block(spapr->xics, req_num, false, irq = spapr_ics_alloc_block(spapr->ics, req_num, false,
ret_intr_type == RTAS_TYPE_MSI, &err); ret_intr_type == RTAS_TYPE_MSI, &err);
if (err) { if (err) {
error_reportf_err(err, "Can't allocate MSIs for device %x: ", error_reportf_err(err, "Can't allocate MSIs for device %x: ",
@ -375,7 +375,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
/* Release previous MSIs */ /* Release previous MSIs */
if (msi) { if (msi) {
xics_spapr_free(spapr->xics, msi->first_irq, msi->num); spapr_ics_free(spapr->ics, msi->first_irq, msi->num);
g_hash_table_remove(phb->msi, &config_addr); g_hash_table_remove(phb->msi, &config_addr);
} }
@ -1747,7 +1747,7 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
uint32_t irq; uint32_t irq;
Error *local_err = NULL; Error *local_err = NULL;
irq = xics_spapr_alloc_block(spapr->xics, 1, true, false, &local_err); irq = spapr_ics_alloc_block(spapr->ics, 1, true, false, &local_err);
if (local_err) { if (local_err) {
error_propagate(errp, local_err); error_propagate(errp, local_err);
error_prepend(errp, "can't allocate LSIs: "); error_prepend(errp, "can't allocate LSIs: ");

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@ -454,7 +454,7 @@ static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
dev->qdev.id = id; dev->qdev.id = id;
} }
dev->irq = xics_spapr_alloc(spapr->xics, dev->irq, false, &local_err); dev->irq = spapr_ics_alloc(spapr->ics, dev->irq, false, &local_err);
if (local_err) { if (local_err) {
error_propagate(errp, local_err); error_propagate(errp, local_err);
return; return;

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@ -59,6 +59,7 @@ struct sPAPRMachineState {
QLIST_HEAD(, sPAPRPHBState) phbs; QLIST_HEAD(, sPAPRPHBState) phbs;
struct sPAPRNVRAM *nvram; struct sPAPRNVRAM *nvram;
XICSState *xics; XICSState *xics;
ICSState *ics;
DeviceState *rtc; DeviceState *rtc;
void *htab; void *htab;

View File

@ -181,10 +181,10 @@ struct ICSIRQState {
#define XICS_IRQS_SPAPR 1024 #define XICS_IRQS_SPAPR 1024
qemu_irq xics_get_qirq(XICSState *icp, int irq); qemu_irq xics_get_qirq(XICSState *icp, int irq);
int xics_spapr_alloc(XICSState *icp, int irq_hint, bool lsi, Error **errp); int spapr_ics_alloc(ICSState *ics, int irq_hint, bool lsi, Error **errp);
int xics_spapr_alloc_block(XICSState *icp, int num, bool lsi, bool align, int spapr_ics_alloc_block(ICSState *ics, int num, bool lsi, bool align,
Error **errp); Error **errp);
void xics_spapr_free(XICSState *icp, int irq, int num); void spapr_ics_free(ICSState *ics, int irq, int num);
void spapr_dt_xics(XICSState *xics, void *fdt, uint32_t phandle); void spapr_dt_xics(XICSState *xics, void *fdt, uint32_t phandle);
void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu); void xics_cpu_setup(XICSState *icp, PowerPCCPU *cpu);