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target/ppc: cpu_init: Decouple 74xx SPR registration from 7xx 

We're considering these two to be from different CPU families, so
duplicate some code to keep them separate.

Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20220216162426.1885923-10-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Fabiano Rosas 2022-02-18 08:34:14 +01:00 committed by Cédric Le Goater
parent 1a71c5d158
commit 674f45096f
1 changed files with 91 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

107
target/ppc/cpu_init.c
View File

@ -803,6 +803,97 @@ static void register_G2_sprs(CPUPPCState *env)
static void register_74xx_sprs(CPUPPCState *env)
{
/* Breakpoints */
spr_register_kvm(env, SPR_DABR, "DABR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_DABR, 0x00000000);
spr_register(env, SPR_IABR, "IABR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
/* Cache management */
spr_register(env, SPR_ICTC, "ICTC",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
/* Performance monitors */
spr_register(env, SPR_7XX_MMCR0, "MMCR0",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_7XX_MMCR1, "MMCR1",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_7XX_PMC1, "PMC1",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_7XX_PMC2, "PMC2",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_7XX_PMC3, "PMC3",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_7XX_PMC4, "PMC4",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_7XX_SIAR, "SIAR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_7XX_UMMCR0, "UMMCR0",
&spr_read_ureg, SPR_NOACCESS,
&spr_read_ureg, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_7XX_UMMCR1, "UMMCR1",
&spr_read_ureg, SPR_NOACCESS,
&spr_read_ureg, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_7XX_UPMC1, "UPMC1",
&spr_read_ureg, SPR_NOACCESS,
&spr_read_ureg, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_7XX_UPMC2, "UPMC2",
&spr_read_ureg, SPR_NOACCESS,
&spr_read_ureg, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_7XX_UPMC3, "UPMC3",
&spr_read_ureg, SPR_NOACCESS,
&spr_read_ureg, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_7XX_UPMC4, "UPMC4",
&spr_read_ureg, SPR_NOACCESS,
&spr_read_ureg, SPR_NOACCESS,
0x00000000);
spr_register(env, SPR_7XX_USIAR, "USIAR",
&spr_read_ureg, SPR_NOACCESS,
&spr_read_ureg, SPR_NOACCESS,
0x00000000);
/* External access control */
spr_register(env, SPR_EAR, "EAR",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
/* Processor identification */
spr_register(env, SPR_PIR, "PIR",
SPR_NOACCESS, SPR_NOACCESS,
@ -4640,8 +4731,6 @@ static void init_proc_7400(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
/* 74xx specific SPR */
register_74xx_sprs(env);
vscr_init(env, 0x00010000);
@ -4714,8 +4803,6 @@ static void init_proc_7410(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
/* 74xx specific SPR */
register_74xx_sprs(env);
vscr_init(env, 0x00010000);
@ -4795,8 +4882,6 @@ static void init_proc_7440(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
/* 74xx specific SPR */
register_74xx_sprs(env);
vscr_init(env, 0x00010000);
@ -4897,8 +4982,6 @@ static void init_proc_7450(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
/* 74xx specific SPR */
register_74xx_sprs(env);
vscr_init(env, 0x00010000);
/* Level 3 cache control */
@ -5021,8 +5104,6 @@ static void init_proc_7445(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
/* 74xx specific SPR */
register_74xx_sprs(env);
vscr_init(env, 0x00010000);
/* LDSTCR */
@ -5152,8 +5233,6 @@ static void init_proc_7455(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
/* 74xx specific SPR */
register_74xx_sprs(env);
vscr_init(env, 0x00010000);
/* Level 3 cache control */
@ -5285,8 +5364,6 @@ static void init_proc_7457(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
/* 74xx specific SPR */
register_74xx_sprs(env);
vscr_init(env, 0x00010000);
/* Level 3 cache control */
@ -5438,8 +5515,6 @@ static void init_proc_e600(CPUPPCState *env)
{
register_ne_601_sprs(env);
register_sdr1_sprs(env);
register_7xx_sprs(env);
/* 74xx specific SPR */
register_74xx_sprs(env);
vscr_init(env, 0x00010000);