mirror of https://github.com/xemu-project/xemu.git
target/ppc: implement xscv[su]qqp
Implement the following PowerISA v3.1 instructions: xscvsqqp: VSX Scalar Convert with round Signed Quadword to Quad-Precision xscvuqqp: VSX Scalar Convert with round Unsigned Quadword to Quad-Precision format Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220330175932.6995-8-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
parent
bea592300b
commit
67332e0718
|
@ -3058,6 +3058,18 @@ void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, ppc_vsr_t *xb) \
|
||||||
VSX_CVT_INT_TO_FP2(xvcvsxdsp, int64, float32)
|
VSX_CVT_INT_TO_FP2(xvcvsxdsp, int64, float32)
|
||||||
VSX_CVT_INT_TO_FP2(xvcvuxdsp, uint64, float32)
|
VSX_CVT_INT_TO_FP2(xvcvuxdsp, uint64, float32)
|
||||||
|
|
||||||
|
#define VSX_CVT_INT128_TO_FP(op, tp) \
|
||||||
|
void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, ppc_vsr_t *xb)\
|
||||||
|
{ \
|
||||||
|
helper_reset_fpstatus(env); \
|
||||||
|
xt->f128 = tp##_to_float128(xb->s128, &env->fp_status); \
|
||||||
|
helper_compute_fprf_float128(env, xt->f128); \
|
||||||
|
do_float_check_status(env, GETPC()); \
|
||||||
|
}
|
||||||
|
|
||||||
|
VSX_CVT_INT128_TO_FP(XSCVUQQP, uint128);
|
||||||
|
VSX_CVT_INT128_TO_FP(XSCVSQQP, int128);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* VSX_CVT_INT_TO_FP_VECTOR - VSX integer to floating point conversion
|
* VSX_CVT_INT_TO_FP_VECTOR - VSX integer to floating point conversion
|
||||||
* op - instruction mnemonic
|
* op - instruction mnemonic
|
||||||
|
|
|
@ -388,6 +388,8 @@ DEF_HELPER_4(xscvqpsdz, void, env, i32, vsr, vsr)
|
||||||
DEF_HELPER_4(xscvqpswz, void, env, i32, vsr, vsr)
|
DEF_HELPER_4(xscvqpswz, void, env, i32, vsr, vsr)
|
||||||
DEF_HELPER_4(xscvqpudz, void, env, i32, vsr, vsr)
|
DEF_HELPER_4(xscvqpudz, void, env, i32, vsr, vsr)
|
||||||
DEF_HELPER_4(xscvqpuwz, void, env, i32, vsr, vsr)
|
DEF_HELPER_4(xscvqpuwz, void, env, i32, vsr, vsr)
|
||||||
|
DEF_HELPER_3(XSCVUQQP, void, env, vsr, vsr)
|
||||||
|
DEF_HELPER_3(XSCVSQQP, void, env, vsr, vsr)
|
||||||
DEF_HELPER_3(xscvhpdp, void, env, vsr, vsr)
|
DEF_HELPER_3(xscvhpdp, void, env, vsr, vsr)
|
||||||
DEF_HELPER_4(xscvsdqp, void, env, i32, vsr, vsr)
|
DEF_HELPER_4(xscvsdqp, void, env, i32, vsr, vsr)
|
||||||
DEF_HELPER_3(xscvspdp, void, env, vsr, vsr)
|
DEF_HELPER_3(xscvspdp, void, env, vsr, vsr)
|
||||||
|
|
|
@ -91,6 +91,9 @@
|
||||||
|
|
||||||
@X_tp_a_bp_rc ...... ....0 ra:5 ....0 .......... rc:1 &X_rc rt=%x_frtp rb=%x_frbp
|
@X_tp_a_bp_rc ...... ....0 ra:5 ....0 .......... rc:1 &X_rc rt=%x_frtp rb=%x_frbp
|
||||||
|
|
||||||
|
&X_tb rt rb
|
||||||
|
@X_tb ...... rt:5 ..... rb:5 .......... . &X_tb
|
||||||
|
|
||||||
&X_tb_rc rt rb rc:bool
|
&X_tb_rc rt rb rc:bool
|
||||||
@X_tb_rc ...... rt:5 ..... rb:5 .......... rc:1 &X_tb_rc
|
@X_tb_rc ...... rt:5 ..... rb:5 .......... rc:1 &X_tb_rc
|
||||||
|
|
||||||
|
@ -692,6 +695,8 @@ XSCMPGTQP 111111 ..... ..... ..... 0011100100 - @X
|
||||||
## VSX Binary Floating-Point Convert Instructions
|
## VSX Binary Floating-Point Convert Instructions
|
||||||
|
|
||||||
XSCVQPDP 111111 ..... 10100 ..... 1101000100 . @X_tb_rc
|
XSCVQPDP 111111 ..... 10100 ..... 1101000100 . @X_tb_rc
|
||||||
|
XSCVUQQP 111111 ..... 00011 ..... 1101000100 - @X_tb
|
||||||
|
XSCVSQQP 111111 ..... 01011 ..... 1101000100 - @X_tb
|
||||||
XVCVBF16SPN 111100 ..... 10000 ..... 111011011 .. @XX2
|
XVCVBF16SPN 111100 ..... 10000 ..... 111011011 .. @XX2
|
||||||
XVCVSPBF16 111100 ..... 10001 ..... 111011011 .. @XX2
|
XVCVSPBF16 111100 ..... 10001 ..... 111011011 .. @XX2
|
||||||
|
|
||||||
|
|
|
@ -838,6 +838,26 @@ static bool trans_XSCVQPDP(DisasContext *ctx, arg_X_tb_rc *a)
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static bool do_helper_env_X_tb(DisasContext *ctx, arg_X_tb *a,
|
||||||
|
void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr))
|
||||||
|
{
|
||||||
|
TCGv_ptr xt, xb;
|
||||||
|
|
||||||
|
REQUIRE_INSNS_FLAGS2(ctx, ISA310);
|
||||||
|
REQUIRE_VSX(ctx);
|
||||||
|
|
||||||
|
xt = gen_avr_ptr(a->rt);
|
||||||
|
xb = gen_avr_ptr(a->rb);
|
||||||
|
gen_helper(cpu_env, xt, xb);
|
||||||
|
tcg_temp_free_ptr(xt);
|
||||||
|
tcg_temp_free_ptr(xb);
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
TRANS(XSCVUQQP, do_helper_env_X_tb, gen_helper_XSCVUQQP)
|
||||||
|
TRANS(XSCVSQQP, do_helper_env_X_tb, gen_helper_XSCVSQQP)
|
||||||
|
|
||||||
#define GEN_VSX_HELPER_2(name, op1, op2, inval, type) \
|
#define GEN_VSX_HELPER_2(name, op1, op2, inval, type) \
|
||||||
static void gen_##name(DisasContext *ctx) \
|
static void gen_##name(DisasContext *ctx) \
|
||||||
{ \
|
{ \
|
||||||
|
|
Loading…
Reference in New Issue