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target/arm: Do not reject rt == rt2 for strexd 

There was too much cut and paste between ldrexd and strexd,
as ldrexd does prohibit two output registers the same.

Fixes: af28822899
Reported-by: Michael Goffioul <michael.goffioul@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191117090621.32425-2-richard.henderson@linaro.org
Reviewed-by: Robert Foley <robert.foley@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-11-19 13:20:28 +00:00 committed by Peter Maydell
parent 6623d21445
commit 655b02646d
1 changed files with 1 additions and 1 deletions
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2
target/arm/translate.c
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@ -8934,7 +8934,7 @@ static bool op_strex(DisasContext *s, arg_STREX *a, MemOp mop, bool rel)
|| (s->thumb && (a->rd == 13 || a->rt == 13))
|| (mop == MO_64
&& (a->rt2 == 15
|| a->rd == a->rt2 || a->rt == a->rt2
|| a->rd == a->rt2
|| (s->thumb && a->rt2 == 13)))) {
unallocated_encoding(s);
return true;