From 6338bfae98a098e2d6ea50ecdf445a216ba1dd31 Mon Sep 17 00:00:00 2001
From: Matt Borgerson <contact@mborgerson.com>
Date: Tue, 26 Jun 2018 12:29:48 -0700
Subject: [PATCH] [Core Change] Port i8259 fixes from XQEMU 1.x

32cba22 i8259: in edge triggered mode apparently a training edge should cancel the interrupt
ad6aef5 nforce chipset seems to allow setting irq0-3 to level triggered
---
 hw/intc/i8259.c        | 3 +++
 hw/intc/i8259_common.c | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c
index 76f3d873b8..05372ff4a9 100644
--- a/hw/intc/i8259.c
+++ b/hw/intc/i8259.c
@@ -147,6 +147,9 @@ static void pic_set_irq(void *opaque, int irq, int level)
             }
             s->last_irr |= mask;
         } else {
+#ifdef XBOX
+            s->irr &= ~mask;
+#endif
             s->last_irr &= ~mask;
         }
     }
diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c
index c75c880157..2e14f1d582 100644
--- a/hw/intc/i8259_common.c
+++ b/hw/intc/i8259_common.c
@@ -95,7 +95,9 @@ ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master)
     dev = DEVICE(isadev);
     qdev_prop_set_uint32(dev, "iobase", master ? 0x20 : 0xa0);
     qdev_prop_set_uint32(dev, "elcr_addr", master ? 0x4d0 : 0x4d1);
+#ifndef XBOX
     qdev_prop_set_uint8(dev, "elcr_mask", master ? 0xf8 : 0xde);
+#endif
     qdev_prop_set_bit(dev, "master", master);
     qdev_init_nofail(dev);