From dda2441b2bc6844eb4900bf4a7db83157dcd6c3c Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Thu, 22 Mar 2018 10:45:57 -0700 Subject: [PATCH 1/4] target/xtensa: add .inc. to non-top level source file names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix definitions of existing cores and core importing script to follow the rule of naming non-top level source files. Reviewed-by: Eric Blake Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Max Filippov --- target/xtensa/core-dc232b.c | 4 ++-- .../xtensa/core-dc232b/{gdb-config.c => gdb-config.inc.c} | 0 .../{xtensa-modules.c => xtensa-modules.inc.c} | 0 target/xtensa/core-dc233c.c | 4 ++-- .../xtensa/core-dc233c/{gdb-config.c => gdb-config.inc.c} | 0 .../{xtensa-modules.c => xtensa-modules.inc.c} | 0 target/xtensa/core-de212.c | 4 ++-- .../xtensa/core-de212/{gdb-config.c => gdb-config.inc.c} | 0 .../core-de212/{xtensa-modules.c => xtensa-modules.inc.c} | 0 target/xtensa/core-fsf.c | 2 +- .../core-fsf/{xtensa-modules.c => xtensa-modules.inc.c} | 0 target/xtensa/core-sample_controller.c | 4 ++-- .../{gdb-config.c => gdb-config.inc.c} | 0 .../{xtensa-modules.c => xtensa-modules.inc.c} | 0 target/xtensa/import_core.sh | 8 ++++---- 15 files changed, 13 insertions(+), 13 deletions(-) rename target/xtensa/core-dc232b/{gdb-config.c => gdb-config.inc.c} (100%) rename target/xtensa/core-dc232b/{xtensa-modules.c => xtensa-modules.inc.c} (100%) rename target/xtensa/core-dc233c/{gdb-config.c => gdb-config.inc.c} (100%) rename target/xtensa/core-dc233c/{xtensa-modules.c => xtensa-modules.inc.c} (100%) rename target/xtensa/core-de212/{gdb-config.c => gdb-config.inc.c} (100%) rename target/xtensa/core-de212/{xtensa-modules.c => xtensa-modules.inc.c} (100%) rename target/xtensa/core-fsf/{xtensa-modules.c => xtensa-modules.inc.c} (100%) rename target/xtensa/core-sample_controller/{gdb-config.c => gdb-config.inc.c} (100%) rename target/xtensa/core-sample_controller/{xtensa-modules.c => xtensa-modules.inc.c} (100%) diff --git a/target/xtensa/core-dc232b.c b/target/xtensa/core-dc232b.c index fe80582df4..aa07018af4 100644 --- a/target/xtensa/core-dc232b.c +++ b/target/xtensa/core-dc232b.c @@ -35,7 +35,7 @@ #include "overlay_tool.h" #define xtensa_modules xtensa_modules_dc232b -#include "core-dc232b/xtensa-modules.c" +#include "core-dc232b/xtensa-modules.inc.c" static XtensaConfig dc232b __attribute__((unused)) = { .name = "dc232b", @@ -43,7 +43,7 @@ static XtensaConfig dc232b __attribute__((unused)) = { .num_regs = 120, .num_core_regs = 52, .reg = { -#include "core-dc232b/gdb-config.c" +#include "core-dc232b/gdb-config.inc.c" } }, .isa_internal = &xtensa_modules, diff --git a/target/xtensa/core-dc232b/gdb-config.c b/target/xtensa/core-dc232b/gdb-config.inc.c similarity index 100% rename from target/xtensa/core-dc232b/gdb-config.c rename to target/xtensa/core-dc232b/gdb-config.inc.c diff --git a/target/xtensa/core-dc232b/xtensa-modules.c b/target/xtensa/core-dc232b/xtensa-modules.inc.c similarity index 100% rename from target/xtensa/core-dc232b/xtensa-modules.c rename to target/xtensa/core-dc232b/xtensa-modules.inc.c diff --git a/target/xtensa/core-dc233c.c b/target/xtensa/core-dc233c.c index 00301c28a2..8296e6fa10 100644 --- a/target/xtensa/core-dc233c.c +++ b/target/xtensa/core-dc233c.c @@ -36,7 +36,7 @@ #include "overlay_tool.h" #define xtensa_modules xtensa_modules_dc233c -#include "core-dc233c/xtensa-modules.c" +#include "core-dc233c/xtensa-modules.inc.c" static XtensaConfig dc233c __attribute__((unused)) = { .name = "dc233c", @@ -44,7 +44,7 @@ static XtensaConfig dc233c __attribute__((unused)) = { .num_regs = 121, .num_core_regs = 52, .reg = { -#include "core-dc233c/gdb-config.c" +#include "core-dc233c/gdb-config.inc.c" } }, .isa_internal = &xtensa_modules, diff --git a/target/xtensa/core-dc233c/gdb-config.c b/target/xtensa/core-dc233c/gdb-config.inc.c similarity index 100% rename from target/xtensa/core-dc233c/gdb-config.c rename to target/xtensa/core-dc233c/gdb-config.inc.c diff --git a/target/xtensa/core-dc233c/xtensa-modules.c b/target/xtensa/core-dc233c/xtensa-modules.inc.c similarity index 100% rename from target/xtensa/core-dc233c/xtensa-modules.c rename to target/xtensa/core-dc233c/xtensa-modules.inc.c diff --git a/target/xtensa/core-de212.c b/target/xtensa/core-de212.c index 466a467f7f..53775a97fa 100644 --- a/target/xtensa/core-de212.c +++ b/target/xtensa/core-de212.c @@ -36,13 +36,13 @@ #include "overlay_tool.h" #define xtensa_modules xtensa_modules_de212 -#include "core-de212/xtensa-modules.c" +#include "core-de212/xtensa-modules.inc.c" static XtensaConfig de212 __attribute__((unused)) = { .name = "de212", .gdb_regmap = { .reg = { -#include "core-de212/gdb-config.c" +#include "core-de212/gdb-config.inc.c" } }, .isa_internal = &xtensa_modules, diff --git a/target/xtensa/core-de212/gdb-config.c b/target/xtensa/core-de212/gdb-config.inc.c similarity index 100% rename from target/xtensa/core-de212/gdb-config.c rename to target/xtensa/core-de212/gdb-config.inc.c diff --git a/target/xtensa/core-de212/xtensa-modules.c b/target/xtensa/core-de212/xtensa-modules.inc.c similarity index 100% rename from target/xtensa/core-de212/xtensa-modules.c rename to target/xtensa/core-de212/xtensa-modules.inc.c diff --git a/target/xtensa/core-fsf.c b/target/xtensa/core-fsf.c index f41de9a1aa..01932bdc8b 100644 --- a/target/xtensa/core-fsf.c +++ b/target/xtensa/core-fsf.c @@ -36,7 +36,7 @@ #include "overlay_tool.h" #define xtensa_modules xtensa_modules_fsf -#include "core-fsf/xtensa-modules.c" +#include "core-fsf/xtensa-modules.inc.c" static XtensaConfig fsf __attribute__((unused)) = { .name = "fsf", diff --git a/target/xtensa/core-fsf/xtensa-modules.c b/target/xtensa/core-fsf/xtensa-modules.inc.c similarity index 100% rename from target/xtensa/core-fsf/xtensa-modules.c rename to target/xtensa/core-fsf/xtensa-modules.inc.c diff --git a/target/xtensa/core-sample_controller.c b/target/xtensa/core-sample_controller.c index 879e853a92..c622335ca5 100644 --- a/target/xtensa/core-sample_controller.c +++ b/target/xtensa/core-sample_controller.c @@ -36,13 +36,13 @@ #include "overlay_tool.h" #define xtensa_modules xtensa_modules_sample_controller -#include "core-sample_controller/xtensa-modules.c" +#include "core-sample_controller/xtensa-modules.inc.c" static XtensaConfig sample_controller __attribute__((unused)) = { .name = "sample_controller", .gdb_regmap = { .reg = { -#include "core-sample_controller/gdb-config.c" +#include "core-sample_controller/gdb-config.inc.c" } }, .isa_internal = &xtensa_modules, diff --git a/target/xtensa/core-sample_controller/gdb-config.c b/target/xtensa/core-sample_controller/gdb-config.inc.c similarity index 100% rename from target/xtensa/core-sample_controller/gdb-config.c rename to target/xtensa/core-sample_controller/gdb-config.inc.c diff --git a/target/xtensa/core-sample_controller/xtensa-modules.c b/target/xtensa/core-sample_controller/xtensa-modules.inc.c similarity index 100% rename from target/xtensa/core-sample_controller/xtensa-modules.c rename to target/xtensa/core-sample_controller/xtensa-modules.inc.c diff --git a/target/xtensa/import_core.sh b/target/xtensa/import_core.sh index 32255eea9b..58a42987d8 100755 --- a/target/xtensa/import_core.sh +++ b/target/xtensa/import_core.sh @@ -22,7 +22,7 @@ mkdir -p "$TARGET" tar -xf "$OVERLAY" -C "$TARGET" --strip-components=1 \ --xform='s/core/core-isa/' config/core.h tar -xf "$OVERLAY" -O gdb/xtensa-config.c | \ - sed -n '1,/*\//p;/XTREG/,/XTREG_END/p' > "$TARGET"/gdb-config.c + sed -n '1,/*\//p;/XTREG/,/XTREG_END/p' > "$TARGET"/gdb-config.inc.c # # Fix up known issues in the xtensa-modules.c # @@ -33,7 +33,7 @@ tar -xf "$OVERLAY" -O binutils/xtensa-modules.c | \ -e '/^uint32 \*bypass_entry(int i)/,/}/d' \ -e '/^#include "ansidecl.h"/d' \ -e '/^Slot_[a-zA-Z0-9_]\+_decode (const xtensa_insnbuf insn)/,/^}/s/^ return 0;$/ return XTENSA_UNDEFINED;/' \ - > "$TARGET"/xtensa-modules.c + > "$TARGET"/xtensa-modules.inc.c cat < "${TARGET}.c" #include "qemu/osdep.h" @@ -47,13 +47,13 @@ cat < "${TARGET}.c" #include "overlay_tool.h" #define xtensa_modules xtensa_modules_$NAME -#include "core-$NAME/xtensa-modules.c" +#include "core-$NAME/xtensa-modules.inc.c" static XtensaConfig $NAME __attribute__((unused)) = { .name = "$NAME", .gdb_regmap = { .reg = { -#include "core-$NAME/gdb-config.c" +#include "core-$NAME/gdb-config.inc.c" } }, .isa_internal = &xtensa_modules, From 2745c3bbf362600006994fe0a72cacc2117e6bf4 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Thu, 22 Mar 2018 10:54:30 -0700 Subject: [PATCH 2/4] target/xtensa/import_core.sh: fix #include MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change #include to #include "xtensa-isa.h" in imported files to make references to local files consistent. Reviewed-by: Eric Blake Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Max Filippov --- target/xtensa/import_core.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/target/xtensa/import_core.sh b/target/xtensa/import_core.sh index 58a42987d8..af6c610479 100755 --- a/target/xtensa/import_core.sh +++ b/target/xtensa/import_core.sh @@ -33,6 +33,7 @@ tar -xf "$OVERLAY" -O binutils/xtensa-modules.c | \ -e '/^uint32 \*bypass_entry(int i)/,/}/d' \ -e '/^#include "ansidecl.h"/d' \ -e '/^Slot_[a-zA-Z0-9_]\+_decode (const xtensa_insnbuf insn)/,/^}/s/^ return 0;$/ return XTENSA_UNDEFINED;/' \ + -e 's/#include /#include "xtensa-isa.h"/' \ > "$TARGET"/xtensa-modules.inc.c cat < "${TARGET}.c" From 12ab0b33f152b0b69f013082236d5954c5cf5207 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sun, 18 Mar 2018 01:26:54 -0700 Subject: [PATCH 3/4] linux-user/xtensa: remove stray syscall.h Reviewed-by: Peter Maydell Signed-off-by: Max Filippov --- linux-user/xtensa/syscall.h | 0 1 file changed, 0 insertions(+), 0 deletions(-) delete mode 100644 linux-user/xtensa/syscall.h diff --git a/linux-user/xtensa/syscall.h b/linux-user/xtensa/syscall.h deleted file mode 100644 index e69de29bb2..0000000000 From d0ce7e9cfc8eda113f872b608fe4a3dd7662997e Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Fri, 23 Mar 2018 05:56:19 -0700 Subject: [PATCH 4/4] target/xtensa: fix timers test MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The value of CCOUNT special register is calculated as time elapsed since CCOUNT == 0 multiplied by the core frequency. In icount mode time increment between consecutive instructions that don't involve time warps is constant, but unless the result of multiplication of this constant by the core frequency is a whole number the CCOUNT increment between these instructions may not be constant. E.g. with icount=7 each instruction takes 128ns, with core clock of 10MHz CCOUNT values for consecutive instructions are: 502: (128 * 502 * 10000000) / 1000000000 = 642.56 503: (128 * 503 * 10000000) / 1000000000 = 643.84 504: (128 * 504 * 10000000) / 1000000000 = 645.12 I.e.the CCOUNT increments depend on the absolute time. This results in varying CCOUNT differences for consecutive instructions in tests that involve time warps and don't set CCOUNT explicitly. Change frequency of the core used in tests so that clock cycle takes exactly 64ns. Change icount power used in tests to 6, so that each instruction takes exactly 1 clock cycle. With these changes CCOUNT increments only depend on the number of executed instructions and that's what timer tests expect, so they work correctly. Longer story: http://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg04326.html Cc: Pavel Dovgaluk Cc: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Max Filippov --- target/xtensa/core-dc232b.c | 2 +- tests/tcg/xtensa/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/xtensa/core-dc232b.c b/target/xtensa/core-dc232b.c index aa07018af4..7331eeea2f 100644 --- a/target/xtensa/core-dc232b.c +++ b/target/xtensa/core-dc232b.c @@ -47,7 +47,7 @@ static XtensaConfig dc232b __attribute__((unused)) = { } }, .isa_internal = &xtensa_modules, - .clock_freq_khz = 10000, + .clock_freq_khz = (NANOSECONDS_PER_SECOND / 64) / 1000, DEFAULT_SECTIONS }; diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile index 2882c431e4..091518c055 100644 --- a/tests/tcg/xtensa/Makefile +++ b/tests/tcg/xtensa/Makefile @@ -5,7 +5,7 @@ CROSS=xtensa-$(CORE)-elf- ifndef XT SIM = ../../../xtensa-softmmu/qemu-system-xtensa -SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 7 $(EXTFLAGS) -kernel +SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel SIMDEBUG = -s -S else SIM = xt-run