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tcg/riscv: Fix range matched by TCG_CT_CONST_M12 

We were matching a signed 13-bit range, not a 12-bit range.
Expand the commentary within the function and be explicit
about all of the ranges.

Reported-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221022095821.2441874-1-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Richard Henderson 2022-10-22 19:58:21 +10:00 committed by Alistair Francis
parent 824cac681c
commit 6272276361
1 changed files with 16 additions and 3 deletions
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19
tcg/riscv/tcg-target.c.inc
View File

@ -154,13 +154,26 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
if ((ct & TCG_CT_CONST_ZERO) && val == 0) { if ((ct & TCG_CT_CONST_ZERO) && val == 0) {
return 1; return 1;
} }
if ((ct & TCG_CT_CONST_S12) && val == sextreg(val, 0, 12)) { /*
* Sign extended from 12 bits: [-0x800, 0x7ff].
* Used for most arithmetic, as this is the isa field.
*/
if ((ct & TCG_CT_CONST_S12) && val >= -0x800 && val <= 0x7ff) {
return 1; return 1;
} }
if ((ct & TCG_CT_CONST_N12) && -val == sextreg(-val, 0, 12)) { /*
* Sign extended from 12 bits, negated: [-0x7ff, 0x800].
* Used for subtraction, where a constant must be handled by ADDI.
*/
if ((ct & TCG_CT_CONST_N12) && val >= -0x7ff && val <= 0x800) {
return 1; return 1;
} }
if ((ct & TCG_CT_CONST_M12) && val >= -0xfff && val <= 0xfff) { /*
* Sign extended from 12 bits, +/- matching: [-0x7ff, 0x7ff].
* Used by addsub2, which may need the negative operation,
* and requires the modified constant to be representable.
*/
if ((ct & TCG_CT_CONST_M12) && val >= -0x7ff && val <= 0x7ff) {
return 1; return 1;
} }
return 0; return 0;