mirror of https://github.com/xemu-project/xemu.git
realview_gic: Convert to QOM realize
Embed GICState and replace SysBus initfn with realizefn. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
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@ -8,40 +8,46 @@
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*/
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#include "hw/sysbus.h"
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#include "hw/intc/arm_gic.h"
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#define TYPE_REALVIEW_GIC "realview_gic"
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#define REALVIEW_GIC(obj) \
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OBJECT_CHECK(RealViewGICState, (obj), TYPE_REALVIEW_GIC)
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typedef struct {
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typedef struct RealViewGICState {
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SysBusDevice parent_obj;
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DeviceState *gic;
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MemoryRegion container;
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GICState gic;
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} RealViewGICState;
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static void realview_gic_set_irq(void *opaque, int irq, int level)
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{
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RealViewGICState *s = (RealViewGICState *)opaque;
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qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level);
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qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level);
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}
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static int realview_gic_init(SysBusDevice *sbd)
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static void realview_gic_realize(DeviceState *dev, Error **errp)
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{
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DeviceState *dev = DEVICE(sbd);
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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RealViewGICState *s = REALVIEW_GIC(dev);
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SysBusDevice *busdev;
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Error *err = NULL;
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/* The GICs on the RealView boards have a fixed nonconfigurable
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* number of interrupt lines, so we don't need to expose this as
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* a qdev property.
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*/
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int numirq = 96;
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s->gic = qdev_create(NULL, "arm_gic");
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qdev_prop_set_uint32(s->gic, "num-cpu", 1);
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qdev_prop_set_uint32(s->gic, "num-irq", numirq);
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qdev_init_nofail(s->gic);
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busdev = SYS_BUS_DEVICE(s->gic);
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qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", numirq);
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object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
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if (err != NULL) {
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error_propagate(errp, err);
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return;
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}
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busdev = SYS_BUS_DEVICE(&s->gic);
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/* Pass through outbound IRQ lines from the GIC */
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sysbus_pass_irq(sbd, busdev);
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@ -49,27 +55,40 @@ static int realview_gic_init(SysBusDevice *sbd)
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/* Pass through inbound GPIO lines to the GIC */
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qdev_init_gpio_in(dev, realview_gic_set_irq, numirq - 32);
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memory_region_init(&s->container, OBJECT(s),
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"realview-gic-container", 0x2000);
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memory_region_add_subregion(&s->container, 0,
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sysbus_mmio_get_region(busdev, 1));
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memory_region_add_subregion(&s->container, 0x1000,
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sysbus_mmio_get_region(busdev, 0));
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sysbus_init_mmio(sbd, &s->container);
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return 0;
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}
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static void realview_gic_class_init(ObjectClass *klass, void *data)
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static void realview_gic_init(Object *obj)
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{
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SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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RealViewGICState *s = REALVIEW_GIC(obj);
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DeviceState *gicdev;
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sdc->init = realview_gic_init;
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memory_region_init(&s->container, OBJECT(s),
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"realview-gic-container", 0x2000);
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sysbus_init_mmio(sbd, &s->container);
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object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC);
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gicdev = DEVICE(&s->gic);
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qdev_set_parent_bus(gicdev, sysbus_get_default());
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qdev_prop_set_uint32(gicdev, "num-cpu", 1);
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}
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static void realview_gic_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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dc->realize = realview_gic_realize;
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}
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static const TypeInfo realview_gic_info = {
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.name = TYPE_REALVIEW_GIC,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(RealViewGICState),
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.instance_init = realview_gic_init,
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.class_init = realview_gic_class_init,
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};
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