ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

hw/riscv: Support the official PLIC DT bindings 

The official DT bindings of PLIC uses "sifive,plic-1.0.0" as the
compatible string in the upstream Linux kernel. "riscv,plic0" is
now legacy and has to be kept for backward compatibility of legacy
systems.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210430071302.1489082-4-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2021-04-30 15:12:58 +08:00 committed by Alistair Francis
parent 7cfbb17f02
commit 60bb5407f0
2 changed files with 10 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
hw/riscv/sifive_u.c
View File

@ -101,6 +101,9 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap,
static const char * const clint_compat[2] = { static const char * const clint_compat[2] = {
"sifive,clint0", "riscv,clint0" "sifive,clint0", "riscv,clint0"
}; };
static const char * const plic_compat[2] = {
"sifive,plic-1.0.0", "riscv,plic0"
};
if (ms->dtb) { if (ms->dtb) {
fdt = s->fdt = load_device_tree(ms->dtb, &s->fdt_size); fdt = s->fdt = load_device_tree(ms->dtb, &s->fdt_size);
@ -270,7 +273,8 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap,
(long)memmap[SIFIVE_U_DEV_PLIC].base); (long)memmap[SIFIVE_U_DEV_PLIC].base);
qemu_fdt_add_subnode(fdt, nodename); qemu_fdt_add_subnode(fdt, nodename);
qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1); qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1);
qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv,plic0"); qemu_fdt_setprop_string_array(fdt, nodename, "compatible",
(char **)&plic_compat, ARRAY_SIZE(plic_compat));
qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0);
qemu_fdt_setprop(fdt, nodename, "interrupts-extended", qemu_fdt_setprop(fdt, nodename, "interrupts-extended",
cells, (ms->smp.cpus * 4 - 2) * sizeof(uint32_t)); cells, (ms->smp.cpus * 4 - 2) * sizeof(uint32_t));

6
hw/riscv/virt.c
View File

@ -197,6 +197,9 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
static const char * const clint_compat[2] = { static const char * const clint_compat[2] = {
"sifive,clint0", "riscv,clint0" "sifive,clint0", "riscv,clint0"
}; };
static const char * const plic_compat[2] = {
"sifive,plic-1.0.0", "riscv,plic0"
};
if (mc->dtb) { if (mc->dtb) {
fdt = mc->fdt = load_device_tree(mc->dtb, &s->fdt_size); fdt = mc->fdt = load_device_tree(mc->dtb, &s->fdt_size);
@ -319,7 +322,8 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
"#address-cells", FDT_PLIC_ADDR_CELLS); "#address-cells", FDT_PLIC_ADDR_CELLS);
qemu_fdt_setprop_cell(fdt, plic_name, qemu_fdt_setprop_cell(fdt, plic_name,
"#interrupt-cells", FDT_PLIC_INT_CELLS); "#interrupt-cells", FDT_PLIC_INT_CELLS);
qemu_fdt_setprop_string(fdt, plic_name, "compatible", "riscv,plic0"); qemu_fdt_setprop_string_array(fdt, plic_name, "compatible",
(char **)&plic_compat, ARRAY_SIZE(plic_compat));
qemu_fdt_setprop(fdt, plic_name, "interrupt-controller", NULL, 0); qemu_fdt_setprop(fdt, plic_name, "interrupt-controller", NULL, 0);
qemu_fdt_setprop(fdt, plic_name, "interrupts-extended", qemu_fdt_setprop(fdt, plic_name, "interrupts-extended",
plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4); plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4);