From e4f0c6bb1a9f72ad9e32c3171d36bae17ea1cd67 Mon Sep 17 00:00:00 2001 From: Greg Kurz Date: Tue, 17 Oct 2017 21:49:14 +0200 Subject: [PATCH 1/3] ppc: fix setting of compat mode While trying to make KVM PR usable again, commit 5dfaa532ae introduced a regression: the current compat_pvr value is passed to KVM instead of the new one. This means that we always pass 0 instead of the max-cpu-compat PVR during the initial machine reset. And at CAS time, we either pass the PVR from the command line or even don't call kvmppc_set_compat() at all, ie, the PCR will not be set as expected. For example if we start a big endian fedora26 guest in power7 compat mode on a POWER8 host, we get this in the guest: $ cat /proc/cpuinfo processor : 0 cpu : POWER7 (architected), altivec supported clock : 4024.000000MHz revision : 2.0 (pvr 004d 0200) timebase : 512000000 platform : pSeries model : IBM pSeries (emulated by qemu) machine : CHRP IBM pSeries (emulated by qemu) MMU : Hash but the guest can still execute POWER8 instructions, and the following program succeeds: int main() { asm("vncipher 0,0,0"); // ISA 2.07 instruction } Let's pass the new compat_pvr to kvmppc_set_compat() and the program fails with SIGILL as expected. Reported-by: Nageswara R Sastry Signed-off-by: Greg Kurz Signed-off-by: David Gibson --- target/ppc/compat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/compat.c b/target/ppc/compat.c index f8729fe46d..ad8f93c064 100644 --- a/target/ppc/compat.c +++ b/target/ppc/compat.c @@ -141,7 +141,7 @@ void ppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr, Error **errp) cpu_synchronize_state(CPU(cpu)); if (kvm_enabled() && cpu->compat_pvr != compat_pvr) { - int ret = kvmppc_set_compat(cpu, cpu->compat_pvr); + int ret = kvmppc_set_compat(cpu, compat_pvr); if (ret < 0) { error_setg_errno(errp, -ret, "Unable to set CPU compatibility mode in KVM"); From 79b217dedb5ce70c5bc169b5e64b8a1f0d4bef9c Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Fri, 20 Oct 2017 11:53:53 +0200 Subject: [PATCH 2/3] hw/display/sm501: Fix comment in sm501_sysbus_class_init() The "cannot_instantiate_with_device_add_yet" flag has been renamed to "user_creatable" a while ago. Signed-off-by: Thomas Huth Reviewed-by: Gerd Hoffmann Signed-off-by: David Gibson --- hw/display/sm501.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 6eddac911e..7f1822421a 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1758,7 +1758,7 @@ static void sm501_sysbus_class_init(ObjectClass *klass, void *data) dc->reset = sm501_reset_sysbus; dc->vmsd = &vmstate_sm501_sysbus; /* Note: pointer property "chr-state" may remain null, thus - * no need for dc->cannot_instantiate_with_device_add_yet = true; + * no need for dc->user_creatable = false; */ } From c91c187f715aded9e1ac28412bba41fd3cbaf010 Mon Sep 17 00:00:00 2001 From: Michael Davidsaver Date: Fri, 20 Oct 2017 09:38:52 -0500 Subject: [PATCH 3/3] e500: ppce500_init_mpic() return device instead of IRQ array Actual number of interrupt pins isn't known in ppce500_init_mpic() so a hardcoded number was used, which causes a crash with older openpic. Instead, return the DeviceState* and change ppce500_init() to call qdev_get_gpio_in() to get only the irq pins which are needed. Signed-off-by: Michael Davidsaver Signed-off-by: David Gibson --- hw/ppc/e500.c | 32 +++++++++++++------------------- 1 file changed, 13 insertions(+), 19 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 9178e70132..5cf0dabef3 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -729,15 +729,13 @@ static DeviceState *ppce500_init_mpic_kvm(PPCE500Params *params, return dev; } -static qemu_irq *ppce500_init_mpic(MachineState *machine, PPCE500Params *params, - MemoryRegion *ccsr, qemu_irq **irqs) +static DeviceState *ppce500_init_mpic(MachineState *machine, + PPCE500Params *params, + MemoryRegion *ccsr, + qemu_irq **irqs) { - qemu_irq *mpic; DeviceState *dev = NULL; SysBusDevice *s; - int i; - - mpic = g_new0(qemu_irq, 256); if (kvm_enabled()) { Error *err = NULL; @@ -756,15 +754,11 @@ static qemu_irq *ppce500_init_mpic(MachineState *machine, PPCE500Params *params, dev = ppce500_init_mpic_qemu(params, irqs); } - for (i = 0; i < 256; i++) { - mpic[i] = qdev_get_gpio_in(dev, i); - } - s = SYS_BUS_DEVICE(dev); memory_region_add_subregion(ccsr, MPC8544_MPIC_REGS_OFFSET, s->mmio[0].memory); - return mpic; + return dev; } static void ppce500_power_off(void *opaque, int line, int on) @@ -796,8 +790,8 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) /* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and * 4 respectively */ unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4}; - qemu_irq **irqs, *mpic; - DeviceState *dev; + qemu_irq **irqs; + DeviceState *dev, *mpicdev; CPUPPCState *firstenv = NULL; MemoryRegion *ccsr_addr_space; SysBusDevice *s; @@ -866,18 +860,18 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) memory_region_add_subregion(address_space_mem, params->ccsrbar_base, ccsr_addr_space); - mpic = ppce500_init_mpic(machine, params, ccsr_addr_space, irqs); + mpicdev = ppce500_init_mpic(machine, params, ccsr_addr_space, irqs); /* Serial */ if (serial_hds[0]) { serial_mm_init(ccsr_addr_space, MPC8544_SERIAL0_REGS_OFFSET, - 0, mpic[42], 399193, + 0, qdev_get_gpio_in(mpicdev, 42), 399193, serial_hds[0], DEVICE_BIG_ENDIAN); } if (serial_hds[1]) { serial_mm_init(ccsr_addr_space, MPC8544_SERIAL1_REGS_OFFSET, - 0, mpic[42], 399193, + 0, qdev_get_gpio_in(mpicdev, 42), 399193, serial_hds[1], DEVICE_BIG_ENDIAN); } @@ -895,7 +889,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); for (i = 0; i < PCI_NUM_PINS; i++) { - sysbus_connect_irq(s, i, mpic[pci_irq_nrs[i]]); + sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, pci_irq_nrs[i])); } memory_region_add_subregion(ccsr_addr_space, MPC8544_PCI_REGS_OFFSET, @@ -926,7 +920,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) dev = qdev_create(NULL, "mpc8xxx_gpio"); s = SYS_BUS_DEVICE(dev); qdev_init_nofail(dev); - sysbus_connect_irq(s, 0, mpic[MPC8XXX_GPIO_IRQ]); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8XXX_GPIO_IRQ)); memory_region_add_subregion(ccsr_addr_space, MPC8XXX_GPIO_OFFSET, sysbus_mmio_get_region(s, 0)); @@ -946,7 +940,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params) for (i = 0; i < params->platform_bus_num_irqs; i++) { int irqn = params->platform_bus_first_irq + i; - sysbus_connect_irq(s, i, mpic[irqn]); + sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, irqn)); } memory_region_add_subregion(address_space_mem,