mirror of https://github.com/xemu-project/xemu.git
target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes
Add the LSA opcode to the MSA32 decodetree config, add DLSA to a new config for the MSA64 ASE, and call decode_msa64() in the main decode_opc() loop. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201215225757.764263-23-f4bug@amsat.org>
This commit is contained in:
parent
a685f7d075
commit
5f21f30d85
|
@ -1,5 +1,6 @@
|
||||||
gen = [
|
gen = [
|
||||||
decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'),
|
decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'),
|
||||||
|
decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'),
|
||||||
]
|
]
|
||||||
|
|
||||||
mips_ss = ss.source_set()
|
mips_ss = ss.source_set()
|
||||||
|
|
|
@ -10,11 +10,16 @@
|
||||||
# (Document Number: MD00866-2B-MSA32-AFP-01.12)
|
# (Document Number: MD00866-2B-MSA32-AFP-01.12)
|
||||||
#
|
#
|
||||||
|
|
||||||
|
&rtype rs rt rd sa
|
||||||
|
|
||||||
&msa_bz df wt s16
|
&msa_bz df wt s16
|
||||||
|
|
||||||
|
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
|
||||||
@bz ...... ... .. wt:5 s16:16 &msa_bz df=3
|
@bz ...... ... .. wt:5 s16:16 &msa_bz df=3
|
||||||
@bz_df ...... ... df:2 wt:5 s16:16 &msa_bz
|
@bz_df ...... ... df:2 wt:5 s16:16 &msa_bz
|
||||||
|
|
||||||
|
LSA 000000 ..... ..... ..... 000 .. 000101 @lsa
|
||||||
|
|
||||||
BZ_V 010001 01011 ..... ................ @bz
|
BZ_V 010001 01011 ..... ................ @bz
|
||||||
BNZ_V 010001 01111 ..... ................ @bz
|
BNZ_V 010001 01111 ..... ................ @bz
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,17 @@
|
||||||
|
# MIPS SIMD Architecture Module instruction set
|
||||||
|
#
|
||||||
|
# Copyright (C) 2020 Philippe Mathieu-Daudé
|
||||||
|
#
|
||||||
|
# SPDX-License-Identifier: LGPL-2.1-or-later
|
||||||
|
#
|
||||||
|
# Reference:
|
||||||
|
# MIPS Architecture for Programmers Volume IV-j
|
||||||
|
# The MIPS64 SIMD Architecture Module, Revision 1.12
|
||||||
|
# (Document Number: MD00868-1D-MSA64-AFP-01.12)
|
||||||
|
#
|
||||||
|
|
||||||
|
&rtype rs rt rd sa !extern
|
||||||
|
|
||||||
|
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
|
||||||
|
|
||||||
|
DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
|
|
@ -19,6 +19,7 @@
|
||||||
|
|
||||||
/* Include the auto-generated decoder. */
|
/* Include the auto-generated decoder. */
|
||||||
#include "decode-msa32.c.inc"
|
#include "decode-msa32.c.inc"
|
||||||
|
#include "decode-msa64.c.inc"
|
||||||
|
|
||||||
#define OPC_MSA (0x1E << 26)
|
#define OPC_MSA (0x1E << 26)
|
||||||
|
|
||||||
|
@ -2266,7 +2267,20 @@ static bool trans_MSA(DisasContext *ctx, arg_MSA *a)
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static bool trans_LSA(DisasContext *ctx, arg_rtype *a)
|
||||||
|
{
|
||||||
|
return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa);
|
||||||
|
}
|
||||||
|
|
||||||
|
static bool trans_DLSA(DisasContext *ctx, arg_rtype *a)
|
||||||
|
{
|
||||||
|
return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa);
|
||||||
|
}
|
||||||
|
|
||||||
bool decode_ase_msa(DisasContext *ctx, uint32_t insn)
|
bool decode_ase_msa(DisasContext *ctx, uint32_t insn)
|
||||||
{
|
{
|
||||||
|
if (TARGET_LONG_BITS == 64 && decode_msa64(ctx, insn)) {
|
||||||
|
return true;
|
||||||
|
}
|
||||||
return decode_msa32(ctx, insn);
|
return decode_msa32(ctx, insn);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue