diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c index 640b2114b4..b954eb8490 100644 --- a/hw/core/machine-smp.c +++ b/hw/core/machine-smp.c @@ -290,6 +290,7 @@ bool machine_parse_smp_cache(MachineState *ms, const SmpCachePropertiesList *node; DECLARE_BITMAP(caches_bitmap, CACHE_LEVEL_AND_TYPE__MAX); + bitmap_zero(caches_bitmap, CACHE_LEVEL_AND_TYPE__MAX); for (node = caches; node; node = node->next) { /* Prohibit users from repeating settings. */ if (test_bit(node->value->cache, caches_bitmap)) { @@ -316,7 +317,7 @@ bool machine_parse_smp_cache(MachineState *ms, !mc->smp_props.cache_supported[props->cache]) { error_setg(errp, "%s cache topology not supported by this machine", - CacheLevelAndType_str(node->value->cache)); + CacheLevelAndType_str(props->cache)); return false; } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f9147fecbd..317aaca25a 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1228,7 +1228,6 @@ void pc_basic_device_init(struct PCMachineState *pcms, isa_realize_and_unref(pcms->pcspk, isa_bus, &error_fatal); } - assert(pcms->vmport >= 0 && pcms->vmport < ON_OFF_AUTO__MAX); if (pcms->vmport == ON_OFF_AUTO_AUTO) { pcms->vmport = (xen_enabled() || !pcms->i8042_enabled) ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index 8e553487d5..7f13b0588f 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -3152,7 +3152,7 @@ static void scsi_property_set_loadparm(Object *obj, const char *value, return; } - lp_str = g_malloc0(strlen(value)); + lp_str = g_malloc0(strlen(value) + 1); if (!qdev_prop_sanitize_s390x_loadparm(lp_str, value, errp)) { g_free(lp_str); return; diff --git a/target/i386/hvf/x86_task.c b/target/i386/hvf/x86_task.c index f09bfbdda5..cdea2ea69d 100644 --- a/target/i386/hvf/x86_task.c +++ b/target/i386/hvf/x86_task.c @@ -122,7 +122,6 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, int rea load_regs(cpu); struct x86_segment_descriptor curr_tss_desc, next_tss_desc; - int ret; x68_segment_selector old_tss_sel = vmx_read_segment_selector(cpu, R_TR); uint64_t old_tss_base = vmx_read_segment_base(cpu, R_TR); uint32_t desc_limit; @@ -138,7 +137,7 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, int rea if (reason == TSR_IDT_GATE && gate_valid) { int dpl; - ret = x86_read_call_gate(cpu, &task_gate_desc, gate); + x86_read_call_gate(cpu, &task_gate_desc, gate); dpl = task_gate_desc.dpl; x68_segment_selector cs = vmx_read_segment_selector(cpu, R_CS); @@ -167,11 +166,12 @@ void vmx_handle_task_switch(CPUState *cpu, x68_segment_selector tss_sel, int rea x86_write_segment_descriptor(cpu, &next_tss_desc, tss_sel); } - if (next_tss_desc.type & 8) - ret = task_switch_32(cpu, tss_sel, old_tss_sel, old_tss_base, &next_tss_desc); - else + if (next_tss_desc.type & 8) { + task_switch_32(cpu, tss_sel, old_tss_sel, old_tss_base, &next_tss_desc); + } else { //ret = task_switch_16(cpu, tss_sel, old_tss_sel, old_tss_base, &next_tss_desc); VM_PANIC("task_switch_16"); + } macvm_set_cr0(cpu->accel->fd, rvmcs(cpu->accel->fd, VMCS_GUEST_CR0) | CR0_TS_MASK);